MA330026 Microchip Technology, MA330026 Datasheet - Page 70

• Manufacturer Part Number: MA330026
• Description: Daughter Cards & OEM Boards dsPIC33FJ16MC102 Plug-In Module
• Manufacturer: Microchip Technology

Specifications of MA330026

• Rohs: yes
• Product: Plug-In Modules
• Core: PIC
• Data Bus Width: 16 bit
• Description/function: dsPIC33F MC 28 Pin QFN to 100 Pin Plug-in-Module
• Interface Type: I2C, SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Operating Supply Voltage: 3 V to 3.6 V
• For Use With: DM330021, DM330022, DM330023

dsPIC33FJ16GP101/102 AND dsPIC33FJ16MC101/102
REGISTER 6-1:
DS70652C-page 70
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13-10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
Note 1:
TRAPR
R/W-0
R/W-0
EXTR
2:
All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
TRAPR: Trap Reset Flag bit
1 = A Trap Conflict Reset has occurred
0 = A Trap Conflict Reset has not occurred
IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1 = An illegal opcode detection, an illegal address mode or uninitialized W register used as an
0 = An illegal opcode or uninitialized W Reset has not occurred
Unimplemented: Read as ‘0’
CM: Configuration Mismatch Flag bit
1 = A configuration mismatch Reset has occurred
0 = A configuration mismatch Reset has NOT occurred
VREGS: Voltage Regulator Stand-by During Sleep bit
1 = Voltage regulator is active during Sleep
0 = Voltage regulator goes into Stand-by mode during Sleep
EXTR: External Reset (MCLR) Pin bit
1 = A Master Clear (pin) Reset has occurred
0 = A Master Clear (pin) Reset has not occurred
SWR: Software Reset (Instruction) Flag bit
1 = A RESET instruction has been executed
0 = A RESET instruction has not been executed
SWDTEN: Software Enable/Disable of WDT bit
1 = WDT is enabled
0 = WDT is disabled
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
SLEEP: Wake-up from Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
IDLE: Wake-up from Idle Flag bit
1 = Device was in Idle mode
0 = Device was not in Idle mode
IOPUWR
R/W-0
R/W-0
SWR
Address Pointer caused a Reset
RCON: RESET CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
SWDTEN
R/W-0
U-0
—
(2)
WDTO
R/W-0
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
SLEEP
R/W-0
(2)
U-0
—
(1)
R/W-0
IDLE
U-0
—
© 2011 Microchip Technology Inc.
x = Bit is unknown
R/W-0
R/W-1
BOR
CM
VREGS
R/W-0
R/W-1
POR
bit 8
bit 0