EVAL-AD7661EDZ Analog Devices, EVAL-AD7661EDZ Datasheet
EVAL-AD7661EDZ
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EVAL-AD7661EDZ Summary of contents
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... Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices ...
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... Conversion Control.................................................................... 21 REVISION HISTORY Revision 0: Initial Version. Digital Interface.......................................................................... 22 Parallel Interface......................................................................... 22 Serial Interface ............................................................................ 22 Master Serial Interface............................................................... 23 Slave Serial Interface .................................................................. 24 Microprocessor Interfacing....................................................... 26 Application Hints ........................................................................... 27 Bipolar and Wider Input Ranges .............................................. 27 Layout .......................................................................................... 27 Evaluating the AD7661’s Performance .................................... 27 Outline Dimensions ....................................................................... 28 Ordering Guide .......................................................................... 28 Rev Page ...
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SPECIFICATIONS Table 2. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted Parameter RESOLUTION ANALOG INPUT Voltage Range Operating Input Voltage Analog Input CMRR Input Current 1 Input Impedance THROUGHPUT ...
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AD7661 Parameter DIGITAL INPUTS Logic Levels DIGITAL OUTPUTS 5 Data Format Pipeline Delay POWER SUPPLIES Specified Performance AVDD DVDD OVDD Operating Current 8 AVDD 9 AVDD 10 ...
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TIMING SPECIFICATIONS Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2 5.25 V, unless otherwise noted Parameter Refer to Figure 33 and Figure 34 Convert Pulse Width Time between Conversions CNVST LOW to ...
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AD7661 Table 4. Serial Clock Timings in Master Read after Convert DIVSCLK[1] DIVSCLK[0] SYNC to SCLK First Edge Delay Minimum Internal SCLK Period Minimum Internal SCLK Period Maximum Internal SCLK HIGH Minimum Internal SCLK LOW Minimum SDOUT Valid Setup Time ...
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ABSOLUTE MAXIMUM RATINGS 1 Table 5. AD7661 Stress Ratings Parameter Rating TEMP , REF, REFBUFIN, AVDD + 0 INGND, REFGND to AGND AGND – 0.3 V Ground Voltage Differences AGND, DGND, OGND ±0.3 V ...
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AD7661 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS Table 6. Pin Function Descriptions 1 Pin No. Mnemonic Type Description 1, 36, AGND P Analog Power Ground Pin. 41 AVDD P Input Analog Power Pin. Nominally ...
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Pin No. Mnemonic Type Description DI/O When SER/PAR is LOW, this output is used as Bit 7 of the parallel port data output bus. RDC/SDIN When SER/PAR is HIGH, this input, part of the serial port, ...
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AD7661 1 Pin No. Mnemonic Type Description Primary Analog Input with a Range 2 TEMP AO Temperature Sensor Voltage Output. 46 REFBUFIN AI/O Reference Input Voltage. The reference output and the ...
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DEFINITIONS OF SPECIFICATIONS Integral Nonlinearity Error (INL) Linearity error refers to the deviation of each individual code from a line drawn from negative full scale through positive full scale. The point used as negative full scale occurs ½ LSB before ...
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AD7661 TYPICAL PERFORMANCE CHARACTERISTICS 2.5 2.0 1.5 1.0 0.5 0 –0.5 –1.0 –1.5 –2.0 –2.5 0 16384 32768 CODE Figure 5. Integral Nonlinearity vs. Code 0.0 0.5 1.0 1.5 POSITIVE INL (LSB) Figure 6. Typical ...
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CODE IN HEX Figure 11. Histogram of 261,120 Conversions Input at the ...
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AD7661 –55 –35 – TEMPERATURE (°C) Figure 17. SNR, S/(N+D), and ENOB vs. Temperature –100 –105 –110 –115 –120 –55 –35 – TEMPERATURE (°C) Figure 18. THD and ...
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OVDD = 2.7V @ 85°C 45 OVDD = 2.7V @ 25° OVDD = 5V @ 85°C 20 OVDD = 5V @ 25° 100 150 C L (pF) Figure 23. ...
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AD7661 CIRCUIT INFORMATION IN REF REFGND 32,768C INGND The AD7661 is a very fast, low power, single supply, precise 16-bit analog-to-digital converter (ADC). The AD7661 is capable of converting 100,000 samples per second (100 kSPS) and allows power savings between ...
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Transfer Functions Using the OB/ 2C digital input, the AD7661 offers two output codings: straight binary and twos complement. The LSB size is V /65536, which is about 38.15 µV. The AD7661’s ideal REF transfer characteristic is shown in Figure ...
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AD7661 TYPICAL CONNECTION DIAGRAM Figure 26 shows a typical connection diagram for the AD7661. Analog Input Figure 27 shows an equivalent circuit of the input structure of the AD7661. The two diodes, D1 and D2, provide ESD protection for the ...
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The noise generated by the driver amplifier needs to be kept as low as possible in order to preserve the SNR and transition noise performance of the AD7661. The noise coming from the driver is filtered by the AD7661 ...
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AD7661 For applications that use multiple AD7661s more effective to use the internal buffer to buffer the reference voltage. Care should be taken with the voltage reference’s temperature coefficient, which directly affects the full-scale accuracy if this parameter ...
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CONVERSION CONTROL Figure 33 shows the detailed timing diagrams of the conversion process. The AD7661 is controlled by the CNVST signal, which initiates conversion. Once initiated, it cannot be restarted or aborted, even by the power-down input PD, until the ...
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AD7661 DIGITAL INTERFACE The AD7661 has a versatile digital interface; it can be interfaced with the host system by using either a serial or a parallel interface. The serial interface is multiplexed on the parallel data bus. The AD7661 digital ...
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MASTER SERIAL INTERFACE Internal Clock The AD7661 is configured to generate and provide the serial data clock SCLK when the EXT/ INT pin is held LOW. The AD7661 also generates a SYNC signal to indicate to the host when the ...
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AD7661 SLAVE SERIAL INTERFACE External Clock The AD7661 is configured to accept an externally supplied serial data clock on the SCLK pin when the EXT/ INT pin is held HIGH. In this mode, several methods can be used to read ...
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External Discontinuous Clock Data Read After Conversion Though the maximum throughput cannot be achieved using this mode the most recommended of the serial slave modes. Figure 41 shows the detailed timing diagrams of this method. After a conversion ...
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AD7661 MICROPROCESSOR INTERFACING The AD7661 is ideally suited for traditional dc measurement applications supporting a microprocessor, and for ac signal processing applications interfacing to a digital signal processor. The AD7661 is designed to interface either with a parallel 8-bit or ...
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... OGND is connected to the digital system ground. EVALUATING THE AD7661’S PERFORMANCE A recommended layout for the AD7661 is outlined in the EVAL-AD7661 evaluation board package includes a fully assembled and tested evaluation board, documentation, and software for controlling the board from a PC via the Rev Page AD7661 evaluation board for the AD7661 ...
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... This board can be used as a standalone evaluation board or in conjunction with the EVAL-CONTROL BRD2 for evaluation/demonstration purposes. 2 This board allows control and communicate with all Analog Devices evaluation boards ending in the CB designators. © 2003 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners ...