ATSAM4S-WPIR-RD Atmel, ATSAM4S-WPIR-RD Datasheet - Page 11

• Manufacturer Part Number: ATSAM4S-WPIR-RD
• Description: Development Boards & Kits - ARM SAM4S16 W.PIR CAMERA REF. DESIGN
• Manufacturer: Atmel

Specifications of ATSAM4S-WPIR-RD

• Rohs: yes
• Product: Reference Designs
• Tool Is For Evaluation Of: ATSAM3S4BA
• Core: ARM Cortex M3
• Interface Type: JTAG, USB
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 bit
• For Use With: RF231USB-RD

4.3.1
Clock generator
The ATSAM3S4BA has a flexible clock system, supporting a large number of clock sources. It incorporates both
calibrated integrated and external crystal oscillators and resonators. The Atmel SAM3S family allows dynamic switching
between the following clock sources:
Figure 4-3. Clock generator block diagram.
From these, four different internal clocks are generated: Both 32kHz oscillators may trigger the slow clock, suitable for
low power modes. The two remaining sources are inputs to the Main clock as well as to two high frequency phase-
locked loop (PLL) clocks, whereas variable multipliers and dividers can be applied to generate a wide range of clock
frequencies.
After reset, the device will always start up running from slow clock. Usually the other clock sources are set up and
switched to during initialization. In normal operation, the system clock source and prescalers can be changed from
software at any time.
X O U T 3 2 / P A 8
X O U T / P B 8
•
•
•
•
X I N 3 2 / P A 7
X I N / P B 9
( S u p p ly C o n t r o l l e r )
Embedded 32kHz RC oscillator
32.768kHz crystal oscillator
Embedded 4/8/12MHz fast RC oscillator
3-20MHz crystal or ceramic oscillator
X T A L S E L
C lo c k G e n e r a t o r
R C O s c i ll a t o r
R C O s c illa to r
4 /8 / 1 2 M H z
M a n a g e m e n t
E m b e d d e d
E m b e d d e d
R e s o n a t o r
3 2 7 6 8 H z
3 - 2 0 M H z
O s c i l l a t o r
O s c i l l a t o r
S t a t u s
C e r a m i c
C r y s t a l
C r y s t a l
C o n t r o l le r
3 2 k H z
P o w e r
F a s t
o r
Atmel AVR2030: ATRF231USB – Hardware User Manual [APPLICATION NOTE]
C o n t r o l
0 1 0 1
M O S C S E L
P L L B a n d
P L L A a n d
D iv id e r / 2
P L L B D I V 2
P L L A D I V 2
D iv i d e r / 2
P L L A C l o c k
P L L A C K
S l o w C l o c k
S L C K
M a i n C l o c k
M A I N C K
P L L B C lo c
P L L B C K
42018A−AVR−08/2012
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