EVAL-AD7655EDZ Analog Devices, EVAL-AD7655EDZ Datasheet - Page 7

• Manufacturer Part Number: EVAL-AD7655EDZ
• Description: Data Conversion IC Development Tools AD7655Eval Board 16bit 500ksps ADC
• Manufacturer: Analog Devices
• Type: ADCr
• Series: AD7655r

Specifications of EVAL-AD7655EDZ

• Rohs: yes
• Product: Evaluation Boards
• Tool Is For Evaluation Of: AD7655
• Interface Type: SPI
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Factory Pack Quantity: 1

ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Analog Input
INAx
Ground Voltage Differences
Supply Voltages
Digital Inputs
Internal Power Dissipation
Internal Power Dissipation
Junction Temperature
Storage Temperature Range
Lead Temperature Range
1
2
3
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product
features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to
high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid
performance degradation or loss of functionality.
See the Analog Inputs section.
Specification is for device in free air: 48-lead LQFP, θ
θ
Specification is for device in free air: 48-lead LFCSP, θ
JC
AGND, DGND, OGND
AVDD, DVDD, OVDD
AVDD to DVDD, AVDD to OVDD
DVDD to OVDD
(Soldering 10 sec)
= 30°C/W.
1
, INBx
1
, REFx, INxN, REFGND
2
3
Values
±0.3 V
–0.3 V to +7 V
−0.3 V to +7 V
AVDD + 0.3 V to
AGND − 0.3 V
±7 V
−0.3 V to DVDD + 0.3 V
700 mW
2.5 W
150°C
−65°C to +150°C
300°C
JA
JA
= 91°C/W,
= 26°C/W.
Rev. B | Page 7 of 28
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
t
DELAY
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
C
0.8V
TO OUTPUT
L
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
Figure 2. Load Circuit for Digital Interface Timing
Figure 3. Voltage Reference Levels for Timing
PIN
60pF*
C
2V
0.8V
L
1.6mA
500μA
I
I
OL
OH
2V
t
DELAY
1.4V
2V
0.8V
AD7655