AT27C020-90JU Atmel, AT27C020-90JU Datasheet - Page 3

IC OTP 2MBIT 90NS 32PLCC

AT27C020-90JU

Manufacturer Part Number
AT27C020-90JU
Description
IC OTP 2MBIT 90NS 32PLCC
Manufacturer
Atmel
Datasheets

Specifications of AT27C020-90JU

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
2M (256K x 8)
Speed
90ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-PLCC
Organization
256 K x 8
Access Time
55 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Maximum Operating Temperature
85 C
Interface Type
Parallel
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Capacitance, Input
4 pF
Capacitance, Output
8 pF
Current, Input, Leakage
±1 μA
Current, Operating
25 mA (Read)
Current, Output, Leakage
±5
Density
2M
Package Type
PLCC
Temperature, Operating
-40 to +85 °C
Time, Access
90 ns
Time, Address Setup
2
Time, Fall
20 ns
Time, Rise
20 ns
Voltage, Esd
2000 V
Voltage, Input, High
5.5 V (Read)
Voltage, Input, Low
0.8 V (Read)
Voltage, Output, High
2.4 V (Read)
Voltage, Output, Low
0.4 V (Read)
Voltage, Supply
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3. System Considerations
4. Block Diagram
5. Absolute Maximum Ratings*
Note:
0570G–EPROM–12/07
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
V
Respect to Ground .......................................-2.0V to +14.0V
PP
Supply Voltage with
1. Minimum voltage is -0.6V DC, which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC, which may overshoot to +7.0V for pulses of less than 20 ns.
Switching between active and standby conditions via the Chip Enable pin may produce tran-
sient voltage excursions. Unless accommodated by the system design, these transients may
exceed datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high-
frequency, low inherent inductance, ceramic capacitor should be utilized for each device. This
capacitor should be connected between the V
to the device as possible. Additionally, to stabilize the supply-voltage level on printed circuit
boards with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again
connected between the V
close as possible to the point where the power supply is connected to the array.
CC
(1)
(1)
(1)
and Ground terminals. This capacitor should be positioned as
*NOTICE:
CC
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
and Ground terminals of the device, as close
AT27C020
3

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