AD9265-FMC-125EBZ Analog Devices, AD9265-FMC-125EBZ Datasheet

AD9265-FMC-125EBZ

Manufacturer Part Number

AD9265-FMC-125EBZ

Description

Data Conversion IC Development Tools 16 Bit 125 Msps high SNR 1.8

Manufacturer

Analog Devices

Datasheet

1.AD9265-FMC-125EBZ.pdf (44 pages)

Specifications of AD9265-FMC-125EBZ

Rohs

yes

Product

Evaluation Boards

Factory Pack Quantity

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Data Sheet

FEATURES

SNR = 79.0 dBFS @ 70 MHz and 125 MSPS

SFDR = 93 dBc @ 70 MHz and 125 MSPS

Low power: 373 mW @ 125 MSPS

1.8 V analog supply operation

1.8 V CMOS or LVDS output supply

Integer 1-to-8 input clock divider

IF sampling frequencies to 300 MHz

−154.3 dBm/Hz small signal input noise with 200 Ω input

Optional on-chip dither

Programmable internal ADC voltage reference

Integrated ADC sample-and-hold inputs

Flexible analog input range: 1 V p-p to 2 V p-p

Differential analog inputs with 650 MHz bandwidth

ADC clock duty cycle stabilizer

Serial port control

User-configurable, built-in self-test (BIST) capability

Energy-saving power-down modes

APPLICATIONS

Communications

Multimode digital receivers (3G)

Smart antenna systems

General-purpose software radios

Broadband data applications

Ultrasound equipment

Rev. B

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

impedance @ 70 MHz and 125 MSPS

GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX,

and TD-SCDMA

DITHER

SYNC

VREF

CLK+

CLK–

VCM

VIN+

VIN–

SENSE

TRACK-AND-HOLD

MANAGEMENT

RBIAS

REFERENCE

Document Feedback

CLOCK

FUNCTIONAL BLOCK DIAGRAM

PDWN

SVDD SCLK/

AGND

16-BIT

CORE

ADC

SERIAL PORT

DFS

Figure 1.

16-Bit, 125 MSPS/105 MSPS/80 MSPS,

AVDD (1.8V)

SDIO/

DCS

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Technical Support

PRODUCT HIGHLIGHTS

1.8 V Analog-to-Digital Converter

CSB

AD9265

CMOS OR

On-chip dither option for improved SFDR performance

with low power analog input.

Proprietary differential input that maintains excellent SNR

performance for input frequencies up to 300 MHz.

Operation from a single 1.8 V supply and a separate digital

output driver supply accommodating 1.8 V CMOS or

LVDS outputs.

STAGING

Standard serial port interface (SPI) that supports various

product features and functions, such as data formatting

(offset binary, twos complement, or gray coding), enabling

the clock duty cycle stabilizer, DCS, power-down, test

modes, and voltage reference mode.

Pin compatibility with the AD9255, allowing a simple

migration from 16 bits down to 14 bits.

OUTPUT

(DDR)

LVDS

LVDS LVDS_RS

DRVDD (1.8V)

D15 TO D0

DCO

AD9265

www.analog.com

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