EVAL-AD7651EDZ Analog Devices, EVAL-AD7651EDZ Datasheet - Page 5

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EVAL-AD7651EDZ

Manufacturer Part Number
EVAL-AD7651EDZ
Description
Data Conversion IC Development Tools AD7651 Eval Board 16bit 100 kSPS ADC
Manufacturer
Analog Devices
Type
ADCr
Series
AD7651r
Datasheet

Specifications of EVAL-AD7651EDZ

Rohs
yes
Product
Evaluation Boards
Tool Is For Evaluation Of
AD7651
Interface Type
SPI
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Factory Pack Quantity
1
TIMING SPECIFICATIONS
Table 3. –40°C to +85°C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted
Parameter
Refer to Figure 26 and Figure 27
Refer to Figure 28, Figure 29, and
Refer to Figure 32 and Figure 33 (Master Serial Interface Modes)
Refer to
1
2
In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load C
In Serial Master Read during Convert Mode. See Table 4 for serial master read after convert mode.
Convert Pulse Width
Time between Conversions
CNVST LOW to BUSY HIGH Delay
BUSY HIGH All Modes Except Master Serial Read after Convert
Aperture Delay
End of Conversion to BUSY LOW Delay
Conversion Time
Acquisition Time
RESET Pulse Width
CNVST LOW to DATA Valid Delay
DATA Valid to BUSY LOW Delay
Bus Access Request to DATA Valid
Bus Relinquish Time
CS LOW to SYNC Valid Delay
CS LOW to Internal SCLK Valid Delay
CS LOW to SDOUT Delay
CNVST LOW to SYNC Delay
SYNC Asserted to SCLK First Edge Delay
Internal SCLK Period
Internal SCLK HIGH
Internal SCLK LOW
SDOUT Valid Setup Time
SDOUT Valid Hold Time
SCLK Last Edge to SYNC Delay
CS HIGH to SYNC HI-Z
CS HIGH to Internal SCLK HI-Z
CS HIGH to SDOUT HI-Z
BUSY HIGH in Master Serial Read after Convert
CNVST LOW to SYNC Asserted Delay
SYNC Deasserted to BUSY LOW Delay
External SCLK Setup Time
External SCLK Active Edge to SDOUT Delay
SDIN Setup Time
SDIN Hold Time
External SCLK Period
External SCLK HIGH
External SCLK LOW
Figure 34
and
2
2
Figure 35
2
2
2
2
(Slave Serial Interface Modes)
Figure 30
1
(Parallel Interface Modes)
2
Rev. 0 | Page 5 of 28
1
1
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
L
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
of 10 pF; otherwise, the load is 60 pF maximum.
Min
10
10
10
8.75
10
12
5
3
25
12
7
4
2
3
5
3
5
5
25
10
10
Typ
2
525
See Table 4
1.25
25
Max
35
1.25
1.25
1.25
45
15
10
10
10
40
10
10
10
18
AD7651
Unit
ns
µs
ns
µs
ns
ns
µs
µs
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns

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