FDW2507N_Q Fairchild Semiconductor, FDW2507N_Q Datasheet - Page 10
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FDW2507N_Q
Manufacturer Part Number
FDW2507N_Q
Description
MOSFET N-Channel 2.5V Common Drain
Manufacturer
Fairchild Semiconductor
Datasheet
1.FDW2507N_Q.pdf
(13 pages)
Specifications of FDW2507N_Q
Transistor Polarity
N-Channel
Drain-source Breakdown Voltage
20 V
Gate-source Breakdown Voltage
+/- 12 V
Continuous Drain Current
7.5 A
Resistance Drain-source Rds (on)
19 mOhms
Configuration
Dual Common Quad Drain
Maximum Operating Temperature
+ 150 C
Mounting Style
SMD/SMT
Package / Case
TSSOP-8
Fall Time
13 ns
Forward Transconductance Gfs (max / Min)
31 S
Minimum Operating Temperature
- 55 C
Power Dissipation
1.6 W
Rise Time
13 ns
Typical Turn-off Delay Time
35 ns
© 2006 Fairchild Semiconductor Corporation
FAN5631/FAN5632 Rev. 1.0.2
Applications Information
The FAN5631/FAN5632 requires one ceramic bucket
capacitor in the 0.1µF to 1µF range, one 10µF output
bypass capacitor, and one 10µF input bypass capacitor.
To
performance, low-ESR (<0.05Ω) ceramic input and
output bypass capacitors are recommended. X5R- and
X7R-rated capacitors provide adequate performance
over the -40°C to 85°C temperature range.
The bucket capacitor’s value is dependent on load
current requirements. A 1µF bucket capacitor works
well in all applications at all load currents, while a 0.1µF
capacitor supports most applications under 100mA of
load current. The choice of bucket capacitor values
should be verified in the actual application at the lowest
input voltage and highest load current. A 30% margin of
safety is recommended to account for the tolerance of
the bucket capacitor and the variations in the on-
resistance of the internal switches.
One of the key benefits of the ScalarPump architecture
is that the dynamically scaled on resistance of the
switches effectively reduces the peak current in the
obtain
optimum
output
ripple
and
noise
10
bucket capacitor and therefore input and output ripple
currents are also reduced. Nevertheless, due to the
ESR of the input and output bypass capacitors, these
current spikes generate voltage spikes at the input and
output pins. These ESR spikes can be filtered because
their frequencies lie at up to 12 times the clock
frequencies. In applications where conductive and
radiated EMI/RFI interference must be low as possible,
consider additional input and output filtering.
Layout Considerations
While evaluating any switched capacitor DC-DC
converter, be careful to keep the power supply source
impedance low; use of long wires causing high lead
inductances and resistive losses should be avoided. A
carefully laid-out ground plane is essential because
current spikes are generated as the bucket capacitor is
charged and discharged. The input and output bypass
capacitors should be placed as close to the device pins
as possible.
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