IS42S16100E-5TL-TR ISSI, Integrated Silicon Solution Inc, IS42S16100E-5TL-TR Datasheet - Page 30

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IS42S16100E-5TL-TR

Manufacturer Part Number
IS42S16100E-5TL-TR
Description
IC SDRAM 16MBIT 200MHZ 50TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS42S16100E-5TL-TR

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
16M (1M x 16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
50-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS42S16100E, IC42S16100E
30
Interval Between Read and Write Commands
A read command can be interrupted and a new write
command executed while the read cycle is in progress,
i.e., before that cycle completes. Data corresponding
to the new write command can be input at the point
new write command is executed. To prevent collision
between input and output data at the DQn pins during
this operation, the
CAS latency = 2, 3, burstlength = 4
COMMAND
U/LDQM
CLK
DQ
READ (CA=A, BANK 0)
READ A0
HI-Z
D
WRITE B0
IN
t
CCD
B0
WRITE (CA=B, BANK 0)
D
IN
B1
D
output data must be masked using the U/LDQM pins. The
interval (t
one clock cycle.
The selected bank must be set to the active state before
executing this command.
IN
B2
Integrated Silicon Solution, Inc. — www.issi.com
ccd
D
IN
) between these commands must be at least
B3
01/22/08
Rev. C

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