GLS85LP1016B-M-I-44CN-ED000 Greenliant, GLS85LP1016B-M-I-44CN-ED000 Datasheet - Page 2

• Manufacturer Part Number: GLS85LP1016B-M-I-44CN-ED000
• Description: Memory IC Development Tools 16GByte NANDrv Eval Brd / 44-pin ATA Con
• Manufacturer: Greenliant

Specifications of GLS85LP1016B-M-I-44CN-ED000

• Rohs: yes

1.0 GENERAL DESCRIPTION
Each PATA NANDrive contains an integrated PATA NAND flash memory controller and NAND flash die in a BGA
or LBGA package. Refer to Figure 2-1 for the PATA NANDrive block diagram.
1.1 Optimized PATA NANDrive
The heart of PATA NANDrive is the PATA NAND flash
memory controller, which translates standard PATA
signals into flash media data and control signals. The
following components contribute to PATA NANDrive’s
operation.
1.1.1 Microcontroller Unit (MCU)
The MCU transfers the ATA/IDE commands into data
and control signals required for flash media operation.
1.1.2 Internal Direct Memory Access (DMA)
PATA NANDrive uses internal DMA allowing instant
data transfer from/to buffer to/from flash media. This
implementation eliminates microcontroller overhead
associated
approach, thereby increasing the data transfer rate.
1.1.3 Power Management Unit (PMU)
The PMU controls the power consumption of PATA
NANDrive. The PMU dramatically reduces the power
consumption of PATA NANDrive by putting the part of
the circuitry that is not in operation into sleep mode.
The Flash File System handles inadvertent power
interrupts and has auto-recovery capability to ensure
PATA NANDrive’s data integrity. For regular power
management,
IDLE_IMMEDIATE command and wait for command
ready before powering down PATA NANDrive.
1.1.4 Embedded Flash File System
The embedded flash file system is an integral part of
PATA NANDrive. It contains MCU firmware that
performs the following tasks:
These specifications are subject to change without notice.
© 2013 Greenliant Systems
GLS85LP1002A / 1004B / 1008B / 1016B / 1032A
Industrial / Commercial Temp
1. Translates host side signals into flash media
2. Provides flash media wear leveling to spread
3. Keeps track of data file structures
4. Manages system security for the selected
5. Stores the data in flash media upon completion
writes and reads
the flash writes across all memory address
space to increase the longevity of flash media
protection zones
of a Write command (PATA NANDrive does not
perform Post-Write operations, except for when
the write cache is enabled)
with
the
the
Host
traditional,
must
PATA NANDrive™
firmware-based
send
an
2
1.1.5 Error Correction Code (ECC)
High performance is achieved through optimized
hardware error detection and correction.
1.1.6 Serial Communication Interface (SCI)
The Serial Communication Interface (SCI) is designed
for error reporting. During the product development
stage, it is recommended to provide the SCI port on
the PCB to aid in design validation.
1.1.7 Multi-tasking Interface
The multi-tasking interface enables fast, sustained
write performance by allowing concurrent Read,
Program and Erase operations to multiple flash media.
1.2 SMT Reflow Consideration
The PATA NANDrive family utilizes standard NAND
flash for data storage. Because the high temperature
in a surface-mount soldering reflow process can alter
the content on NAND flash, do not program PATA
NANDrive before the reflow process.
1.3 Advanced NAND Management
PATA
advanced wear-leveling algorithms to substantially
increase the longevity of NAND flash media. Wear
caused by data writes is evenly distributed in all or
select blocks in the device that prevents “hot spots” in
locations that are programmed and erased extensively.
This effective wear-leveling technique results in
optimized device endurance, enhanced data retention
and higher reliability required by long-life applications.
NANDrive’s
integrated
Fact Sheet 02.001
controller
February 2013
02/12/2013
S71441-F
uses