ZSPM4011KIT ZMDI, ZSPM4011KIT Datasheet - Page 19

• Manufacturer Part Number: ZSPM4011KIT
• Description: Power Management IC Development Tools DC-DC Converter Kit
• Manufacturer: ZMDI
• Type: DC/DC Converters, Regulators & Controllersr

Specifications of ZSPM4011KIT

• Rohs: yes
• Product: Evaluation Kits
• Tool Is For Evaluation Of: ZSPM4011
• Input Voltage: 6 V to 24 V
• Output Voltage: 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V, 0.9 V to 5 V
• Output Current: 1 A

5.3.
5.3.1.
This terminal is the unregulated input voltage source for the ZSPM4011. It is recommended that a 10µF bypass
capacitor be placed close to the device for best performance. Since this is the main supply for the ZSPM4011, good
layout practices must be followed for this connection.
5.3.2.
This terminal will provide the bootstrap voltage required for the upper internal NMOS switch of the buck regulator. An
external ceramic capacitor placed between the BST input terminal, and the VSW pin will provide the necessary
voltage for the upper switch. In normal operation, the capacitor is re-charged on every low side synchronous
switching action. If the switch mode approaches 100% duty cycle for the high side FET, the device will automatically
reduce the duty cycle switch to a minimum off time on every 8
5.3.3.
This is the input terminal for the output voltage feedback. For the fixed-mode versions, this should be connected
directly to V
possible to the capacitor. The trace should not be shared with any other connection. For adjustable-mode versions of
the ZSPM4011, this should be connected to the external resistor divider. To choose the resistors, use the following
equation:
The input to the FB pin is high impedance, and input current should be less than 100nA. As a result, good layout
practices are required for the feedback resistors and feedback traces. When using the adjustable version, the
feedback trace should be kept as short and narrow as possible to reduce stray capacitance and the injection of noise.
5.3.4.
This is the switching node of the regulator. It should be connected directly to the 4.7µH inductor with a wide, short
trace and to one end of the bootstrap capacitor. It is switching between VCC and PGND at the switching frequency.
5.3.5.
This ground is used for the majority of the device including the analog reference, control loop, and other circuits.
5.3.6.
This is a separate ground connection used for the low-side synchronous switch to isolate switching noise from the
rest of the device.
5.3.7.
This is the input terminal to activate the regulator. The input threshold is TTL/CMOS compatible. It also has an
internal pull-up to ensure a stable state if the pin is disconnected.
5.3.8.
This is an open drain, active low output. The switched mode output voltage is monitored, and the PG line will remain
low until the output voltage reaches the V
voltage is above the desired threshold, an internal delay timer is activated and the PG line is de-asserted (to high)
once this delay timer expires. In the event that the output voltage decreases below V
asserted low and remain low until the output rises above V
Data Sheet
September 21, 2012
ZSPM4011
High Efficiency 1A Synchronous Buck Converter
Detailed Pin Description
Unregulated Input, VCC (Pins # 2, 3)
Bootstrap Control, BST (Pin #10)
Sense Feedback, FB (Pin #5)
Switching Output, VSW (Pins #12, 13)
Ground, GND (Pin #4)
Power Ground, PGND (Pins #14, 15)
Enable, High-Voltage, EN (Pin #9)
PG Output, PG (Pin #8)
OUT
. The connection on the PCB should be kept as short as possible and should be made as close as
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 1.03
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without the
prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
V
OUT
= 0.9 (1 + R
OUT-UV
TOP
/R
threshold. Once the internal comparator detects that the output
BOT
)
OUT-UV
th
cycle to allow this capacitor to re-charge.
and the delay timer times out. (See Figure 3.2.)
OUT-UV
, the PG line will be
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