MT48LC8M8A2P-75 IT:G Micron Technology Inc, MT48LC8M8A2P-75 IT:G Datasheet - Page 60

• Manufacturer Part Number: MT48LC8M8A2P-75 IT:G
• Description: IC SDRAM 64MBIT 133MHZ 54TSOP
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC8M8A2P-75 IT:G

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 64M (8M x 8)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 54-TSOP II
• Organization: 8Mx8
• Density: 64Mb
• Address Bus: 14b
• Access Time (max): 6/5.4ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 140mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 43:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMU
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CKE
A10
CLK
DQ
t CKS
t CMS
Single READ – With Auto Precharge
t AS
t AS
t AS
ACTIVE
ROW
ROW
T0
BANK
t CMH
t CKH
Notes:
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
T1
1. For this example, BL = 1, and CL = 2.
2. READ command not allowed or
3. x16: A8, A9 and A11 = “Don’t Care”
NOP
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t CL
T2
NOP 2
t CH
T3
NOP 2
ENABLE AUTO PRECHARGE
t CMS
60
COLUMN m 3
BANK
T4
READ
t
RAS would be violated.
t CMH
CAS Latency
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T5
NOP
t AC
t RP
D
T6
OUT
NOP
64Mb: x4, x8, x16 SDRAM
t OH
m
t HZ
©2000 Micron Technology, Inc. All rights reserved.
ACTIVE
BANK
ROW
T7
ROW
Timing Diagrams
T8
NOP
DON’T CARE
UNDEFINED