MT48LC2M32B2P-55:G Micron Technology Inc, MT48LC2M32B2P-55:G Datasheet - Page 56
![IC SDRAM 64MBIT 5.5NS 86TSOP](/photos/7/22/72264/557-86-tsop_sml.jpg)
MT48LC2M32B2P-55:G
Manufacturer Part Number
MT48LC2M32B2P-55:G
Description
IC SDRAM 64MBIT 5.5NS 86TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC2M32B2P-6G_TR.pdf
(69 pages)
Specifications of MT48LC2M32B2P-55:G
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (2Mx32)
Speed
5.5ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
86-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 38:
PDF: 09005aef811ce1fe/Source: 09005aef811ce1d5
64MSDRAMx32_2.fm - Rev. J 12/08 EN
Single READ
DQML, DQMH
COMMAND
BA0, BA1
Notes:
DQM /
A0-A9
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a “manual” PRECHARGE.
2. A8, A9 = “Don’t Care.”
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
t RCD
t RAS
t RC
t CK
T1
NOP
DISABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CH
t CMH
CAS Latency
56
SINGLE BANK
PRECHARGE
ALL BANKS
BANK
T3
t LZ
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t RP
t AC
T4
NOP
D
OUT
t OH
t HZ
m
BANK
ROW
T5
ROW
ACTIVE
©2001 Micron Technology, Inc. All rights reserved.
64Mb: x32 SDRAM
DON’T CARE
UNDEFINED
Timing Diagrams
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