MT48LC16M4A2P-75:G Micron Technology Inc, MT48LC16M4A2P-75:G Datasheet - Page 57
![IC SDRAM 64MBIT 133MHZ 54TSOP](/photos/7/22/72261/557-54-tsop_sml.jpg)
MT48LC16M4A2P-75:G
Manufacturer Part Number
MT48LC16M4A2P-75:G
Description
IC SDRAM 64MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC4M16A2P-75G_TR.pdf
(72 pages)
Specifications of MT48LC16M4A2P-75:G
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
64M (16Mx4)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-TSOP II
Organization
16Mx4
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT48LC16M4A2P-75:G
Manufacturer:
MICRON
Quantity:
465
Company:
Part Number:
MT48LC16M4A2P-75:G
Manufacturer:
TI
Quantity:
111
Figure 40:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
DQML, DQMH
A0–A9, A11
COMMAND
BA0, BA1
DQM /
CKE
A10
CLK
DQ
t CMS
t CKS
t AS
t AS
t AS
READ – Without Auto Precharge
ACTIVE
ROW
ROW
BANK
T0
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a “manual”
2. x16: A8, A9 and A11 = “Don’t Care”
DISABLE AUTO PRECHARGE
PRECHARGE.
x8: A9 and A11 = “Don’t Care”
x4: A11 = “Don’t Care”
t CMS
t CL
COLUMN m
BANK
T2
READ
t CMH
t CH
CAS Latency
2
T3
NOP
t LZ
t AC
57
T4
D
NOP
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
t OH
m+1
t AC
SINGLE BANKS
ALL BANKS
PRECHARGE
BANK(S)
D
T6
OUT
t OH
64Mb: x4, x8, x16 SDRAM
m+2
t RP
t AC
©2000 Micron Technology, Inc. All rights reserved.
D
T7
NOP
OUT
t OH
m+3
Timing Diagrams
t HZ
BANK
ACTIVE
ROW
ROW
T8
DON’T CARE
UNDEFINED