IS42S16800E-75ETL ISSI, Integrated Silicon Solution Inc, IS42S16800E-75ETL Datasheet - Page 16

• Manufacturer Part Number: IS42S16800E-75ETL
• Description: IC SDRAM 128MBIT 133MHZ 54TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S16800E-75ETL

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 128M (8Mx16)
• Speed: 133MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 54-TSOP II
• Organization: 16Mx8
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 5.5ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 130mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS42S81600E, IS42S16800E
DC ELECTRICAL CHARACTERISTICS 1
i
i
1. I
2. Input signals are changed one time during 30ns.
DC ELECTRICAL CHARACTERISTICS 2
i
i
16
Symbol Parameter
i
i
I
i
i
i
I
i
i
i
Notes:
Symbol Parameter
V
V
dd1
dd2p
dd2ps
dd2n
dd2ns
dd3p
dd3ps
dd3n
dd3ns
dd4
dd5
dd6
il
ol
oh
ol
dd
(1)
(
(2)
(2)
(2)
max
) is specified at the output open condition.
Operating Current
Precharge Standby Current
(In Power-Down Mode)
Precharge Standby Current
with clock stop
(In Power-Down Mode)
Precharge Standby Current
(In Non Power-Down Mode)
Precharge Standby Current
with clock stop
(In Non Power-Down Mode)
Active Standby Current
(In Power-Down Mode)
Active Standby Current
with clock stop
(In Power-Down Mode)
Active Standby Current
(In Non Power-Down Mode)
Active Standby Current
with clock stop
(In Non Power-Down Mode)
Operating Current
Auto-Refresh Current
Self-Refresh Current
Input Leakage Current
Output Leakage Current
Output High Voltage Level
Output Low Voltage Level
Test Condition
One bank active, CL = 3, BL = 1,
t
CKE ≤ V
CS ≥ V
CKE ≤ V
CS ≥ V
CS ≥ V
t
CS ≥ V
All inputs stable
CKE ≤ V
t
CKE ≤ V
CS ≥ V
CS ≥ V
t
CS ≥ V
All inputs stable
All banks active, BL = 4, CL = 3,
t
t
CKE ≤ 0.2V
Test Condition
0V ≤ Vin ≤ V
the tested pin at 0V
Output is disabled, 0V ≤ Vout ≤ V
I
I
clk
ck
ck
rc
oh
ol
ck
ck
= 15ns
= t
= 2mA
= t
= -2mA
= 15ns
= 15ns
= t
ck
rc
clk
dd
dd
dd
dd
dd
dd
dd
(min)
il
il
il
il
(min), t
(
- 0.2V
(
- 0.2V
- 0.2V, CKE ≥ V
- 0.2V, CKE ≥ V
(
(
- 0.2V
- 0.2V, CKE ≥ V
- 0.2V, CKE ≥ V
(min), t
max
max
max
max
dd
(Recommended Operation Conditions unless otherwise noted.)
), t
), CLK ≤ V
), CS ≥ V
), CLK ≤ V
, with pins other than
(Recommended Operation Conditions unless otherwise noted.)
clk
rc
ck
= t
= t
= 15ns
clk
rc
dd
(min)
(min)
il
il
ih
ih
ih
ih
(
(
- 0.2V
(
(
(
(
max
max
min
min
min
min
Integrated Silicon Solution, Inc. — www.issi.com
)
),
)
)
)
)
dd
,
20
30
160
35
55
180
200
-5
2
2
4
3
2
140
150
180
35
20
55
30
-6
2
2
4
3
2
Min
2.4
-5
-5
—
120
130
160
35
20
55
30
-7
2
2
4
3
2
Max
0.4
—
5
5
-75E
120
130
160
35
20
55
30
2
2
4
3
2
03/16/2011
Unit
µA
µA
V
V
Rev. D
Unit
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA