MAX17039EVKIT+ Maxim Integrated, MAX17039EVKIT+ Datasheet - Page 11

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MAX17039EVKIT+

Manufacturer Part Number
MAX17039EVKIT+
Description
Power Management IC Development Tools Dual-Output 3-Phase + 1 Phase Quick-PWM Controller for VR12/IMVP-7
Manufacturer
Maxim Integrated
Series
MAX17039r
Datasheet
The MAX17039 consists of two high-current SMPSs for
the CPU and GPU cores. The CPU core SMPS buck-
regulator design is optimized for a 350kHz switching
frequency and output-voltage settings of approximately
1.200V. At V
ripple is approximately 25% (LIR = 0.25). The MAX17039
controller interleaves all phases, resulting in 120N out-
of-phase operation that minimizes the input and output
filtering requirements. The MAX17039 controller shares
the current between the three phases, supplying up to
33A per phase. The GPU 1-phase SMPS operates at
440kHz switching frequency and delivers up to 33A.
Both CPU and GPU cores are fully compliant with Intel’s
IMVP-7 serial VID communication and control specifica-
tion. CPU and GPU core outputs are controlled indepen-
dently by writing the appropriate data into a function-
Table 1.
LINE
Detailed Description of Hardware
NO.
10
11
12
13
14
15
16
17
18
19
20
21
0
1
2
3
4
5
6
7
8
9
640mV
VID7
MAX17039 IMVP-7 Output-Voltage SVID 8-Bit DAC Codes
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
OUT
______________________________________________________________________________________
= 1.200V and V
320mV
VID6
Setting the Output Voltages
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
160mV
VID5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
IN
= 12V, the inductor
80mV
VID4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
40mV
VID3
8-Bit DAC
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
20mV
VID2
MAX17039 Evaluation Kit
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
mapped register file. Output voltages are dynamically
changed through a 3-wire serial VID interface (3-wire
SVID: clock, data, ALERT), allowing the switching regu-
lators to be individually programmed to different voltages
(Table 1). A slew-rate controller allows controlled transi-
tions between VID codes, and controlled soft-start. SVID
also allows each regulator to be individually set into a
low-power pulse-skipping state. Transient-phase overlap
improves the response of the pseudo fixed-frequency
architecture, reducing the total output capacitance for
the CPU core.
The MAX17039 includes output overvoltage protection
(OVP), undervoltage protection (UVP), and thermal-fault
protection. When any of these protection features detect
a fault, the controller shuts down both channels. True
differential current sensing improves current limit and
load-line accuracy.
10mV
VID1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
VID0
5mV
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
HEX1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
HEX0
C
D
0
1
2
3
4
5
6
7
8
9
A
B
E
F
0
1
2
3
4
5
SETPOINT
0.0000
0.2500
0.2550
0.2600
0.2650
0.2700
0.2750
0.2800
0.2850
0.2900
0.2950
0.3000
0.3050
0.3100
0.3150
0.3200
0.3250
0.3300
0.3350
0.3400
0.3450
0.3500
DAC
(V)
ACCURACY
(Q% of VID)
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
35mV
11

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