IS42S32400E-7TLI ISSI, Integrated Silicon Solution Inc, IS42S32400E-7TLI Datasheet - Page 12

• Manufacturer Part Number: IS42S32400E-7TLI
• Description: IC SDRAM 128MBIT 143MHZ 86TSOP
• Manufacturer: ISSI, Integrated Silicon Solution Inc
• Type: SDRAMr

Specifications of IS42S32400E-7TLI

• Format - Memory: RAM
• Memory Type: SDRAM
• Memory Size: 128M (4Mx32)
• Speed: 143MHz
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 86-TSOPII
• Organization: 4Mx32
• Density: 128Mb
• Address Bus: 14b
• Access Time (max): 6.5/5.4ns
• Maximum Clock Rate: 143MHz
• Operating Supply Voltage (typ): 3.3V
• Package Type: TSOP-II
• Operating Temp Range: -40C to 85C
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Supply Current: 130mA
• Pin Count: 86
• Mounting: Surface Mount
• Operating Temperature Classification: Industrial
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

IS42S32400E
12
CKE RELATED COMMAND TRUTH TABLE
Current State
Self-Refresh (S.R.)
Self-Refresh Recovery Idle After t
Power-Down (P.D.)
Both Banks Idle
Any state
other than
listed above
Notes:
1. H : High level, L : low level, X : High or low level (Don’t care).
2. CKE Low to High transition will re-enable CLK and other inputs asynchronously. A minimum setup
3. Power down and Self refresh can be entered only from the both banks idle state.
4. Must be legal command as defined in Operative Command Table.
5. Illegal if t
time must be satisfied
before any command other than EXIT.
xsr
is not satisfied.
Operation
INVALID, CLK (n - 1) would exit S.R.
Self-Refresh Recovery
Self-Refresh Recovery
Illegal
Illegal
Maintain S.R.
Idle After t
Illegal
Illegal
Begin clock suspend next cycle
Begin clock suspend next cycle
Illegal
Illegal
Exit clock suspend next cycle
Maintain clock suspend
INVALID, CLK (n - 1) would exit P.D.
EXIT P.D. --> Idle
Maintain power down mode
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Auto-Refresh
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Refer to operations in Operative Command Table
Self-Refresh
Refer to operations in Operative Command Table
Power-Down
Refer to operations in Operative Command Table
Begin clock suspend next cycle
Exit clock suspend next cycle
Maintain clock suspend
rc
rc
(3)
(3)
(2)
(2)
(2)
(2)
(5)
(5)
(4)
(1)
n-1
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
L
L
CKE
X
H
H
H
H
H
H
H
H
H
X
H
H
H
H
H
H
X
H
H
n
L
L
L
L
L
L
L
L
L
L
L
L
L
L
CS
X
H
X
H
H
X
X
X
X
X
H
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Integrated Silicon Solution, Inc. - www.issi.com
RAS
X
X
H
H
X
X
H
H
X
H
H
X
X
X
X
X
X
H
X
H
X
X
X
X
X
L
L
L
L
L
L
L
L
L
CAS
H
X
X
H
X
H
X
X
X
H
X
X
H
X
X
L
X
L
X
L
X
X
X
X
X
L
L
L
L
X
X
X
X
X
WE
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
H
X
X
X
H
X
X
X
X
X
L
L
Op - Code
Op - Code
Address
—
—
—
—
—
—
—
Rev. 00C
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
08/01/08