IS42S32800D-7BL-TR ISSI, Integrated Silicon Solution Inc, IS42S32800D-7BL-TR Datasheet - Page 8

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IS42S32800D-7BL-TR

Manufacturer Part Number
IS42S32800D-7BL-TR
Description
IC SDRAM 256MBIT 143MHZ 90BGA
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS42S32800D-7BL-TR

Format - Memory
RAM
Memory Type
SDRAM
Memory Size
256M (8Mx32)
Speed
143MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
90-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS42S32800D-7BL-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS42S32800D
8
3
4
PrechargeAll command
(RAS#=”L”,CAS#=”H”,WE#=”L”,BS =Don t care,A10 =”H”)
The Precharge All command precharges all the four banks simultaneously and can be issued even if all banks are
not in the active state. All banks are then switched to the idle state.
Read command
(RAS#=”H”,CAS#=”L”,WE#=”H”,BS =Bank,A10 =”L”,A0-A8 =Column Address)
The Read command is used to read a burst of data on consecutive clock cycles from an active row in an active
bank.The bank must be active for at least tRCD(min.) before the Read command is issued.During read bursts,
the valid data-out element from the starting column address will be available following the CAS# latency after the
issue of the Read command.Each subsequent data- out element will be valid by the next positive clock edge (refer
to the following figure).The DQs go into high-impedance at the end of the burst unless other command is initiated.
The burst length,burst sequence,and CAS# latency are determined by the mode register which is already
programmed.A full-page burst will continue until terminated (at the end of the page it will wrap to column 0 and
continue).
Integrated Silicon Solution, Inc. — www.issi.com
Rev. 00B
11/21/07

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