IS61NLP25636A-200B3LI ISSI, Integrated Silicon Solution Inc, IS61NLP25636A-200B3LI Datasheet - Page 26

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IS61NLP25636A-200B3LI

Manufacturer Part Number
IS61NLP25636A-200B3LI
Description
IC SRAM 9MBIT 200MHZ 165FBGA
Manufacturer
ISSI, Integrated Silicon Solution Inc

Specifications of IS61NLP25636A-200B3LI

Format - Memory
RAM
Memory Type
SRAM - Synchronous
Memory Size
9M (256K x 36)
Speed
200MHz
Interface
Parallel
Voltage - Supply
3.135 V ~ 3.465 V
Operating Temperature
-40°C ~ 85°C
Package / Case
165-FBGA
Density
9Mb
Access Time (max)
3.1ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
200MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
18b
Package Type
BGA
Operating Temp Range
-40C to 85C
Number Of Ports
4
Supply Current
280mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
165
Word Size
36b
Number Of Words
256K
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
IS61NLP25636A-200B3LI
Manufacturer:
ISSI
Quantity:
3 200
Part Number:
IS61NLP25636A-200B3LI
Manufacturer:
ISSI
Quantity:
1 000
Part Number:
IS61NLP25636A-200B3LI
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
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Part Number:
IS61NLP25636A-200B3LI-TR
Manufacturer:
ISSI, Integrated Silicon Solution Inc
Quantity:
10 000
IS61NLP25636A/IS61NVP25636A
IS61NLP51218A/IS61NVP51218A
INSTRUCTION CODES
TAP CONTROLLER STATE DIAGRAM
26
Code
000
001
010
011
100
101
110
111
SAMPLE/PRELOAD
RESERVED
RESERVED
RESERVED
Instruction
SAMPLE-Z
EXTEST
IDCODE
BYPASS
1
0
Test Logic Reset
Run Test/Idle
0
Description
Captures the Input/Output ring contents. Places the boundary scan register be-
tween the TDI and TDO. Forces all SRAM outputs to High-Z state. This
instruction is not 1149.1 compliant.
Loads the ID register with the vendor ID code and places the register between TDI
and TDO. This operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between
TDI and TDO. Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register
between TDI and TDO. Does not affect the SRAM operation. This instruction does not
implement 1149.1 preload function and is therefore not 1149.1 compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not
affect SRAM operation.
1
Integrated Silicon Solution, Inc. — www.issi.com —
1
0
1
Capture DR
Update DR
Pause DR
Select DR
Exit1 DR
Exit2 DR
Shift DR
0
1
1
1
0
0
0
0
0
1
1
1
0
1
Capture IR
Update IR
Pause IR
Select IR
Exit1 IR
Exit2 IR
Shift IR
0
1
1
0
1
0
0
0
0
1
1
1-800-379-4774
07/28/2010
Rev. G

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