MT48LC64M8A2P-75 IT:C TR Micron Technology Inc, MT48LC64M8A2P-75 IT:C TR Datasheet - Page 53
![IC SDRAM 512MBIT 133MHZ 54TSOP](/photos/7/22/72261/557-54-tsop_sml.jpg)
MT48LC64M8A2P-75 IT:C TR
Manufacturer Part Number
MT48LC64M8A2P-75 IT:C TR
Description
IC SDRAM 512MBIT 133MHZ 54TSOP
Manufacturer
Micron Technology Inc
Datasheet
1.MT48LC64M8A2TG-75C_TR.pdf
(68 pages)
Specifications of MT48LC64M8A2P-75 IT:C TR
Format - Memory
RAM
Memory Type
SDRAM
Memory Size
512M (64M x 8)
Speed
133MHz
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
54-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 37:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMU
Self Refresh Mode
COMMAND
BA0, BA1
A11,A12
A0–A9,
DQM/
Notes:
CKE
A10
CLK
DQ
High-Z
Precharge all
t CKS
active banks
t CMS
t
SINGLE BANK
AS
ALL BANKS
PRECHARGE
BANK(S)
T0
1. No maximum time limit for self refresh;
2.
t CKH
t CMH
t
AH
t CK
t
XSR requires minimum of two clocks regardless of frequency or timing.
t RP
T1
NOP
t CH
Enter self refresh mode
t CKS
t CL
REFRESH
AUTO
T2
≥
CLK stable prior to exiting
(
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t RAS(MIN)
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53
self refresh mode
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
(Restart refresh time base)
t
RAS (MIN) applies to non-self refresh mode.
Tn + 1
Exit self refresh mode
NOP
t XSR
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or COMMAND
INHIBIT
To + 1
512Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
To + 2
REFRESH
AUTO
Timing Diagrams
Don’t Care
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