M93C46-WBN6P STMicroelectronics, M93C46-WBN6P Datasheet - Page 14
![IC EEPROM 1KBIT 2MHZ 8DIP](/photos/1/39/13944/497-8-dip_sml.jpg)
M93C46-WBN6P
Manufacturer Part Number
M93C46-WBN6P
Description
IC EEPROM 1KBIT 2MHZ 8DIP
Manufacturer
STMicroelectronics
Datasheets
1.M93C46-WMN6TP.pdf
(36 pages)
2.M93C46-WMN6TP.pdf
(37 pages)
3.M93C46-WBN6P.pdf
(31 pages)
Specifications of M93C46-WBN6P
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
1K (128 x 8 or 64 x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
2.5 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Organization
128 K x 8
Interface Type
Microwire
Maximum Clock Frequency
2 MHz
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.5 V
Maximum Operating Current
2 mA
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Operating Supply Voltage
2.5 V, 5.5 V
Memory Configuration
128 X 8, 64 X 16
Clock Frequency
2MHz
Supply Voltage Range
2.5V To 5.5V
Memory Case Style
DIP
No. Of Pins
8
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
497-8589-5
M93C46-WBN6P
M93C46-WBN6P
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
M93C46-WBN6P
Manufacturer:
STMicroelectronics
Quantity:
28 850
Part Number:
M93C46-WBN6P
Manufacturer:
ST
Quantity:
20 000
Instructions
5.1
5.2
14/37
Read Data from Memory
The Read Data from Memory (READ) instruction outputs data on Serial Data Output (Q).
When the instruction is received, the op-code and address are decoded, and the data from
the memory is transferred to an output shift register. A dummy 0 bit is output first, followed
by the 8-bit byte or 16-bit word, with the most significant bit first. Output data changes are
triggered by the rising edge of Serial Clock (C). The M93Cx6 automatically increments the
internal address register and clocks out the next byte (or word) as long as the Chip Select
Input (S) is held High. In this case, the dummy 0 bit is not output between bytes (or words)
and a continuous stream of data can be read.
Write Enable and Write Disable
The Write Enable (WEN) instruction enables the future execution of erase or write
instructions, and the Write Disable (WDS) instruction disables it. When power is first
applied, the M93Cx6 initializes itself so that erase and write instructions are disabled. After
an Write Enable (WEN) instruction has been executed, erasing and writing remains enabled
until an Write Disable (WDS) instruction is executed, or until V
reset threshold voltage. To protect the memory contents from accidental corruption, it is
advisable to issue the Write Disable (WDS) instruction after every write cycle. The Read
Data from Memory (READ) instruction is not affected by the Write Enable (WEN) or Write
Disable (WDS) instructions.
Doc ID 4997 Rev 10
M93C86, M93C76, M93C66, M93C56, M93C46
CC
falls below the power-on