W25Q32BVZPIG Winbond Electronics, W25Q32BVZPIG Datasheet - Page 57

• Manufacturer Part Number: W25Q32BVZPIG
• Description: IC SPI FLASH 32MBIT 8WSON
• Manufacturer: Winbond Electronics

Specifications of W25Q32BVZPIG

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 32M (4M x 8)
• Speed: 104MHz
• Interface: SPI Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-WSON
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.2.36 Read SFDP Register (5Ah)
The W25Q32BV features a 256-Byte Serial Flash Discoverable Parameter (SFDP) register that contains
information about device configurations, available instructions and other features. The SFDP parameters
are stored in one or more Parameter Identification (PID) tables. Currently only one PID table is specified,
but more may be added in the future. The Read SFDP Register instruction is compatible with the SFDP
standard initially established in 2010 for PC and other applications, as well as the JEDEC standard 1.0
that is published in 2011. Most Winbond SpiFlash Memories shipped after June 2011 (date code 1124
and beyond) support the SFDP feature as specified in the applicable datasheet.
The Read SFDP instruction is initiated by driving the /CS pin low and shifting the instruction code “5Ah”
followed by a 24-bit address (A23-A0)
SFDP register contents are shifted out on the falling edge of the 40
first as shown in Figure 34. For SFDP register values and descriptions, refer to the following SFDP
Definition table.
Note: 1. A23-A8 = 0; A7-A0 are used to define the starting byte address for the 256-Byte SFDP Register.
(IO
(IO
(IO
(IO
CLK
CLK
/CS
/CS
DO
DO
DI
DI
0
1
0
1
)
)
)
)
Mode 3
Mode 0
0
31
*
7
= MSB
32
6
33
High Impedance
0
5
34
Dummy Byte
1
4
35
Instruction (5Ah)
2
3
Figure 34. Read SFDP Register Instruction Sequence Diagram
36
3
2
37
4
High Impedance
1
38
5
(1)
0
39
into the DI pin. Eight “dummy” clocks are also required before the
6
*
7
40
7
6
23
41
*
8
5
22
42
- 57 -
9
Data Out 1
4
21
43
10
24-Bit Address
3
44
2
45
3
28
1
46
2
29
0
47
th
Publication Release Date: April 01, 2011
1
30
CLK with most significant bit (MSB)
*
7
48
0
31
6
49
5
50
Data Out 2
4
51
W25Q32BV
3
52
2
53
1
54
Revision F
0
55
7