CY7C1041DV33-10ZSXIT Cypress Semiconductor Corp, CY7C1041DV33-10ZSXIT Datasheet
CY7C1041DV33-10ZSXIT
Specifications of CY7C1041DV33-10ZSXIT
Available stocks
Related parts for CY7C1041DV33-10ZSXIT
CY7C1041DV33-10ZSXIT Summary of contents
Page 1
... COLUMN DECODER Note: 1. For guidelines on SRAM system design, please refer to the “System Design Guidelines” Cypress application note, available on the internet at www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05472 Rev. *E 4-Mbit (256K x 16) Static RAM Functional Description The CY7C1041D is a high-performance CMOS static RAM organized as 256K words by 16 bits ...
Page 2
Selection Guide Maximum Access Time Maximum Operating Current Maximum CMOS Standby Current Maximum Ratings (Above which the useful life may be impaired. For user guide- lines, not tested.) Storage Temperature ................................. –65C to +150C Ambient Temperature with Power Applied............................................. –55C ...
Page 3
... GND 1.5V 3 ns Equivalent to: R2 OUTPUT 255 (c) -10 (Industrial) Min. [7] 100 values until the first memory access can be performed less than less than less than t HZCE LZCE HZOE LZOE HZBE CY7C1041D SOJ Package TSOP II Package Unit C/W 57.91 50.66 ...
Page 4
... Notes: 10. The internal Write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a Write, and the transition of either of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write ...
Page 5
Switching Waveforms (continued) [15,16] Read Cycle No. 2 (OE Controlled) ADDRESS CE t ACE OE t BHE, BLE t LZOE t DBE t LZBE HIGH IMPEDANCE DATA OUT t LZCE SUPPLY CURRENT [17, 18] Write Cycle ...
Page 6
Switching Waveforms (continued) Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATAI/O Write Cycle No. 3 (WE Controlled, OE HIGH During Write) ADDRESS BHE, BLE DATA I/O NOTE ...
Page 7
Switching Waveforms (continued) Write Cycle No. 4 (WE Controlled, OE LOW) BHE, BLE ADDRESS BHE, BLE DATA I/O NOTE Truth Table BLE BHE High ...
Page 8
Ordering Information Cypress offers other versions of this type of product in many different configurations and features. The below table contains only the list of parts that are currently available.For a complete listing of all options, visit the Cypress website ...
Page 9
Package Diagrams Figure 1. 44-Lead (400-Mil) Molded SOJ (51-85082) All products and company names mentioned in this document may be the trademarks of their respective holders. Document #: 38-05472 Rev. *E Figure 2. 44-pin TSOP II (51-85087) CY7C1041D 51-85082 *C ...
Page 10
Document History Page Document Title: CY7C1041D 4-Mbit (256K x 16) Static RAM Document Number: 38-05472 Orig. of REV. ECN NO. Issue Date Change ** 201560 See ECN *A 233729 See ECN *B 351117 See ECN *C 446328 See ECN *D ...
Page 11
... Document #: 38-05472 Rev. *E © Cypress Semiconductor Corporation, 2004-2010. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...