DS2502R+T&R Maxim Integrated Products, DS2502R+T&R Datasheet - Page 18

• Manufacturer Part Number: DS2502R+T&R
• Description: IC OTP 1KBIT SOT23-3
• Manufacturer: Maxim Integrated Products

Specifications of DS2502R+T&R

• Format - Memory: EPROMs
• Memory Type: OTP EPROM
• Memory Size: 1K (1K x 1)
• Interface: 1-Wire Serial
• Operating Temperature: -40°C ~ 85°C
• Package / Case: SOT-23-3, TO-236-3, Micro3™, SSD3, SST3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Speed: -
• Lead Free Status / Rohs Status: Details

CRC GENERATION
The DS2502 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM. The bus master can
compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the value stored within
the DS2502 to determine if the ROM data has been received error-free by the bus master. The equivalent
polynomial function of this CRC is: X
Under certain conditions, the DS2502 also generates an 8-bit CRC value using the same polynomial
function shown above and provides this value to the bus master to validate the transfer of command,
address, and data bytes from the bus master to the DS2502. The Memory Function Flow Chart of Figure
6 indicates that the DS2502 computes an 8-bit CRC for the command, address, and data bytes received
for the Write Memory and the Write Status commands and then outputs this value to the bus master to
confirm proper transfer. Similarly the DS2502 computes an 8-bit CRC for the command and address
bytes received from the bus master for the Read Memory, Read Status, and Read Data/Generate 8-Bit
CRC commands to confirm that these bytes have been received correctly. The CRC generator on the
DS2502 is also used to provide verification of error-free data transfer as each page of data from the 1024-
bit EPROM is sent to the bus master during a Read Data/Generate 8-Bit CRC command, and for the 8
bytes of information in the status memory field.
In each case where a CRC is used for data transfer validation, the bus master must calculate a CRC value
using the polynomial function given above and compare the calculated value to either the 8-bit CRC
value stored in the 64-bit ROM portion of the DS2502 (for ROM reads) or the 8-bit CRC value computed
within the DS2502. The comparison of CRC values and decision to continue with an operation are
determined entirely by the bus master. There is no circuitry on the DS2502 that prevents a command
sequence from proceeding if the CRC stored in or calculated by the DS2502 does not match the value
generated by the bus master. Proper use of the CRC as outlined in the flow chart of Figure 6 can result in
a communication channel with a very high level of integrity. For more details on generating CRC values
including example implementations in both hardware and software, see Application Note 27.
INITIALIZATION PROCEDURE “RESET AND PRESENCE PULSES” Figure 10
MASTER
DS2502
RESISTOR
480µs ≤ t
480µs ≤ t
15µs ≤ t
60µs ≤ t
8
+ X
PDH
PDL
5
RSTL
RSTH
+ X
< 240µs
< 60µs
< 960µs
< ∞ (includes recovery time)
4
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+1.