AT29C1024-70JC Atmel, AT29C1024-70JC Datasheet - Page 2
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AT29C1024-70JC
Manufacturer Part Number
AT29C1024-70JC
Description
IC FLASH 1MBIT 70NS 44PLCC
Manufacturer
Atmel
Datasheet
1.AT29C1024-70JC.pdf
(16 pages)
Specifications of AT29C1024-70JC
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
1M (64K x 16)
Speed
70ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT29C1024-70JC
Manufacturer:
ATM
Quantity:
2 200
Company:
Part Number:
AT29C1024-70JC
Manufacturer:
ATM
Quantity:
3 500
Company:
Part Number:
AT29C1024-70JC OBS
Manufacturer:
TI
Quantity:
74
To allow for simple in-system reprogrammability, the
AT29C1024 does not require high input voltages for pro-
gramming. Five-volt-only commands determine the opera-
tion of the device. Reading data out of the device is similar
t o r e a d i n g f r o m a n E P R O M . R e p r o g r a m m i n g t h e
AT29C1024 is performed on a sector basis; 128 words of
data are loaded into the device and then simultaneously
programmed.
Block Diagram
Device Operation
READ: The AT29C1024 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus conten-
tion.
DATA LOAD:
words of a sector to be programmed or the software codes
for data protection. A data load is performed by applying a
low pulse on the WE or CE input with CE or WE low
(respectively) and OE high. The address is latched on the
falling edge of CE or WE, whichever occurs last. The data
is latched by the first rising edge of CE or WE.
PROGRAM: The device is reprogrammed on a sector
basis. If a word of data within a sector is to be changed,
data for the entire sector must be loaded into the device.
Any word that is not loaded during the programming of its
sector will be erased to read FFH. Once the words of a sec-
tor are loaded into the device, they are simultaneously pro-
grammed during the internal programming period. After the
first data word has been loaded into the device, successive
words are entered in the same manner. Each new word to
be programmed must have its high to low transition on WE
(or CE) within 150 s of the low to high transition of WE (or
CE) of the preceding word. If a high to low transition is not
detected within 150 s of the last low to high transition, the
2
Data loads are used to enter the 128
AT29C1024
During a reprogram cycle, the address locations and 128
words of data are internally latched, freeing the address
and data bus for other operations. Following the initiation of
a program cycle, the device will automatically erase the
sector and then program the latched data using an internal
control timer. The end of a program cycle can be detected
by DATA polling of I/O7 or I/O15. Once the end of a pro-
gram cycle has been detected, a new access for a read or
program can begin.
load period will end and the internal programming period
will start. A7 to A15 specify the sector address. The sector
address must be valid during each high to low transition of
WE (or CE). A0 to A6 specify the word address within the
sector. The words may be loaded in any order; sequential
loading is not required. Once a programming operation has
been initiated, and for the duration of t
will effectively be a polling operation.
SOFTWARE DATA PROTECTION:
troll ed data pr otec tion feature is av ailable on the
AT29C1024. Once the software protection is enabled a
software algorithm must be issued to the device before a
program may be performed. The software protection fea-
ture may be enabled or disabled by the user; when shipped
from Atmel, the software data protection feature is dis-
abled. To enable the software data protection, a series of
three program commands to specific addresses with spe-
cific data must be performed. After the software data pro-
tection is enabled the same three program commands
must begin each program cycle in order for the programs to
occur. All software program commands must obey the sec-
tor program timing specifications. Once set, software data
protection will remain active unless the disable command
sequence is issued. Power transitions will not reset the
software data protection feature, however the software fea-
ture will guard against inadvertent program cycles during
power transitions.
WC
, a read operation
A software con-