AT49BV002AT-70VI Atmel, AT49BV002AT-70VI Datasheet

IC FLASH 2MBIT 70NS 32VSOP

AT49BV002AT-70VI

Manufacturer Part Number
AT49BV002AT-70VI
Description
IC FLASH 2MBIT 70NS 32VSOP
Manufacturer
Atmel
Datasheet

Specifications of AT49BV002AT-70VI

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
2M (256K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Features
1. Description
The AT49BV002A(N)(T) is a 2.7-volt-only in-system reprogrammable Flash Memory.
Its 2 megabits of memory is organized as 262,144 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to
70 ns with power dissipation of just 54 mW over the industrial temperature range.
When the device is deselected, the CMOS standby current is less than 50 µA. For the
AT49BV002AN(T) pin 1 for PLCC package and pin 9 for the TSOP package are no
c o n n e c t p i n s . T o a l l o w f o r s i m p l e i n - s y s t e m r e p r o g r a m m a b i l i t y , t h e
AT49BV002A(N)(T) does not require high input voltages for programming. Five-volt-
only commands determine the read and programming operation of the device. Read-
ing data out of the device is similar to reading from an EPROM; it has standard CE,
OE, and WE inputs to avoid bus contention. Reprogramming the AT49BV002A(N)(T)
is performed by erasing a block of data and then programming on a byte by byte
basis. The byte programming time is a fast 30 µs. The end of a program cycle can be
optionally detected by the DATA polling feature. Once the end of a byte program cycle
has been detected, a new access for a read or program can begin. The typical num-
ber of program and erase cycles is in excess of 10,000 cycles.
The device is erased by executing the erase command sequence; the device inter-
nally controls the erase operations. There are two 8K byte parameter block sections,
four main memory blocks, and one boot block.
The device has the capability to protect the data in the boot block; this feature is
enabled by a command sequence. The 16K-byte boot block section includes a repro-
gramming lock out feature to provide data integrity. The boot sector is designed to
contain user secure code, and when the feature is enabled, the boot sector is pro-
tected from being reprogrammed.
In the AT49BV002AN(T), once the boot block programming lockout feature is
enabled, the contents of the boot block are permanent and cannot be changed. In the
AT49BV002A(T), once the boot block programming lockout feature is enabled, the
contents of the boot block cannot be changed with input voltage levels of 5.5 volts or
less.
Single Supply for Read and Write: 2.7 to 3.6V
Fast Read Access Time – 70 ns
Internal Program Control and Timer
Sector Architecture
Fast Erase Cycle Time – 4 Seconds
Byte-by-Byte Programming – 30 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
Green (Pb/Halide-free) Packaging Option
– One 16K Bytes Boot Block with Programming Lockout
– Two 8K Bytes Parameter Blocks
– Four Main Memory Blocks (One 32K Bytes, Three 64K Bytes)
– 15 mA Active Current
– 50 µA CMOS Standby Current
2-megabit
(256K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV002A
AT49BV002AN
AT49BV002AT
AT49BV002ANT
Not
Recommended
for New Design
3353G–FLASH–8/05

Related parts for AT49BV002AT-70VI

AT49BV002AT-70VI Summary of contents

Page 1

... AT49BV002A(T), once the boot block programming lockout feature is enabled, the contents of the boot block cannot be changed with input voltage levels of 5.5 volts or less. 2-megabit (256K x 8) Single 2.7-volt Battery-Voltage Flash Memory AT49BV002A AT49BV002AN AT49BV002AT AT49BV002ANT Not Recommended for New Design 3353G–FLASH–8/05 ...

Page 2

Pin Configurations Pin Name A0 - A17 RESET I/O0 - I/O7 2.1 32-lead PLCC Top View 2.2 32-lead VSOP ( mm) or 32-lead TSOP, Type mm) Top View Note: AT49BV002A(N)(T) ...

Page 3

... Read The AT49BV002A(N)(T) is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the out- puts. The outputs are put in the high impedance state whenever high. This dual-line control gives designers flexibility in preventing bus contention. ...

Page 4

... If the boot block lockout has been enabled, the Chip Erase function will erase Parameter Block 1, Parameter Block 2, Main Memory Block but not the boot block. If the Boot Block Lockout has not been enabled, the Chip Erase function will erase the entire chip. After the full chip erase the device will return back to read mode ...

Page 5

... AT49BV002AN(T). 4.7 Product Identification The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. ...

Page 6

DATA Polling The AT49BV002A(N)(T) features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once ...

Page 7

... SA = 3A000 to 3BFFF for PARAMETER BLOCK 38000 to 39FFF for PARAMETER BLOCK 30000 to 37FFF for MAIN MEMORY ARRAY BLOCK 20000 to 2FFFF for MAIN MEMORY ARRAY BLOCK 10000 to 1FFFF for MAIN MEMORY ARRAY BLOCK 00000 to 0FFFF for MAIN MEMORY ARRAY BLOCK 4 6. Absolute Maximum Ratings* Temperature Under Bias ............................... -55° ...

Page 8

DC and AC Operating Range Operating Temperature (Case) V Power Supply CC 8. Operating Modes Mode CE Read V IL (2) Program/Erase V IL Standby/Write Inhibit V IH Program Inhibit X Program Inhibit X Output Disable X Reset X ...

Page 9

AC Read Characteristics Symbol Parameter t Address to Output Delay ACC ( Output Delay CE ( Output Delay OE (3)( Output Float DF Output Hold from OE, CE ...

Page 10

Input Test Waveform and Measurement Level DRIVING LEVELS < 13. Output Load Test 14. Pin Capacitance ( MHz 25°C Symbol Typ OUT ...

Page 11

AC Byte Load Characteristics Symbol Parameter Address, OE Set-up Time AS OES t Address Hold Time AH t Chip Select Set-up Time CS t Chip Select Hold Time CH t Write Pulse Width (WE or CE) ...

Page 12

Program Cycle Characteristics Symbol Parameter t Byte Programming Time BP t Address Set-up Time AS t Address Hold Time AH t Data Set-up Time DS t Data Hold Time DH t Write Pulse Width WP t Write Pulse Width ...

Page 13

Data Polling Characteristics Symbol Parameter t Data Hold Time Hold Time OEH ( Output Delay OE t Write Recovery Time WR Notes: 1. These parameters are characterized and not 100% tested. 2. See ...

Page 14

Software Product Identification (1) Entry LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 90 TO ADDRESS 555 ENTER PRODUCT IDENTIFICATION (2)(3)(5) MODE 25. Software Product Identification (1) Exit OR LOAD DATA AA TO ...

Page 15

... Ordering Code Package AT49BV002A-70JI 32J AT49BV002A-70TI 32T AT49BV002A-70VI 32V AT49BV002AN-70JI 32J AT49BV002AN-70TI 32T AT49BV002AN-70VI 32V AT49BV002AT-70JI 32J AT49BV002AT-70TI 32T AT49BV002AT-70VI 32V AT49BV002ANT-70JI 32J AT49BV002ANT-70TI 32T AT49BV002ANT-70VI 32V Ordering Code Package AT49BV002AN-70JU 32J AT49BV002AN-70TU 32T AT49BV002AN-70VU 32V AT49BV002ANT-70JU 32J AT49BV002ANT-70TU ...

Page 16

Packaging Information 28.1 32J – PLCC 1.14(0.045 0.51(0.020)MAX 45 MAX (3X) Notes: 1. This package conforms to JEDEC reference MS-016, Variation AE. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is ...

Page 17

TSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and ...

Page 18

VSOP Pin 1 Identifier e E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BA. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and ...

Page 19

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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