AT24C512-10PU-1.8 Atmel, AT24C512-10PU-1.8 Datasheet - Page 6
![IC EEPROM 512KBIT 400KHZ 8DIP](/photos/6/50/65033/313-8-dip_sml.jpg)
AT24C512-10PU-1.8
Manufacturer Part Number
AT24C512-10PU-1.8
Description
IC EEPROM 512KBIT 400KHZ 8DIP
Manufacturer
Atmel
Datasheet
1.AT24C512-10PI-1.8.pdf
(22 pages)
Specifications of AT24C512-10PU-1.8
Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
512K (64K x 8)
Speed
100kHz, 400kHz
Interface
I²C, 2-Wire Serial
Voltage - Supply
1.8 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an exter-
nal device. Data on the SDA pin may change only during SCL low time periods (see
Figure 4 on page 7). Data changes during SCL high periods will indicate a start or stop
condition as defined below.
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition
which must precede any other command (see Figure 5 on page 8).
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition.
After a read sequence, the stop command will place the EEPROM in a standby power
mode (see Figure 5 on page 8).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from
the EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to
acknowledge that it has received each word.
STANDBY MODE: The AT24C512 features a low power standby mode which is
enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion
of any internal operations.
MEMORY RESET: After an interruption in protocol, power loss or system reset, any two-
wire part can be reset by following these steps:
(a) Clock up to 9 cycles, (b) look for SDA high in each cycle while SCL is high and then
(c) create a start condition as SDA is high.
AT24C512
6
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