AT49BV040A-70TU Atmel, AT49BV040A-70TU Datasheet

IC FLASH 4MBIT 70NS 32TSOP

AT49BV040A-70TU

Manufacturer Part Number
AT49BV040A-70TU
Description
IC FLASH 4MBIT 70NS 32TSOP
Manufacturer
Atmel
Datasheet

Specifications of AT49BV040A-70TU

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
4M (512K x 8)
Speed
70ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
1. Description
The AT49BV040A is a 2.7-volt-only in-system reprogrammable Flash Memory. Its
4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with
Atmel’s advanced nonvolatile CMOS technology, the device offers access times to
70 ns with power dissipation of just 54 mW over the commercial temperature range.
When the device is deselected, the CMOS standby current is less than 50 µA. To
allow for simple in-system reprogrammability, the AT49BV040A does not require high
input voltages for programming. Three-volt-only commands determine the read and
programming operation of the device. Reading data out of the device is similar to
reading from an EPROM; it has standard CE, OE, and WE inputs to avoid bus conten-
tion. Reprogramming the AT49BV040A is performed by erasing a block of data and
then programming on a byte by byte basis. The byte programming time is a fast 30 µs.
The end of a program cycle can be optionally detected by the DATA polling feature.
Once the end of a byte program cycle has been detected, a new access for a read or
program can begin. The typical number of program and erase cycles is in excess of
10,000 cycles.
The device is erased by executing the erase command sequence; the device inter-
nally controls the erase operations. There are two 8K byte parameter block sections,
eight main memory blocks, and one boot block.
The device has the capability to protect the data in the boot block; this feature is
enabled by a command sequence. The 16K-byte boot block section includes a repro-
gramming lock out feature to provide data integrity. The boot sector is designed to
contain user secure code, and when the feature is enabled, the boot sector is perma-
nently protected from being reprogrammed.
Single Supply for Read and Write: 2.7 to 3.6V
Fast Read Access Time – 70 ns
Internal Program Control and Timer
Sector Architecture
Fast Erase Cycle Time – 7 Seconds
Byte-by-Byte Programming – 30 µs/Byte Typical
Hardware Data Protection
DATA Polling for End of Program Detection
Low Power Dissipation
Typical 10,000 Write Cycles
Green (Pb/Halide-free) Packaging Option
– One 16K Bytes Boot Block with Programming Lockout
– Two 8K Bytes Parameter Blocks
– Eight Main Memory Blocks (One 32K Bytes, Seven 64K Bytes)
– 15 mA Active Current
– 50 µA CMOS Standby Current
Not Recommended
for New Design
Contact Atmel to discuss
the latest design in trends
and options
4-megabit
(512K x 8)
Single 2.7-volt
Battery-Voltage
Flash Memory
AT49BV040A
3358C–FLASH–3/05

Related parts for AT49BV040A-70TU

AT49BV040A-70TU Summary of contents

Page 1

... Reading data out of the device is similar to reading from an EPROM; it has standard CE, OE, and WE inputs to avoid bus conten- tion. Reprogramming the AT49BV040A is performed by erasing a block of data and then programming on a byte by byte basis. The byte programming time is a fast 30 µs. ...

Page 2

... Pin Configurations Pin Name A0 - A18 I/O0 - I/O7 2.1 32-lead PLCC Top View 2.2 32-lead VSOP ( mm) or 32-lead TSOP, Type mm) – Top View AT49BV040A 2 Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs I/ A11 A13 4 A14 5 A17 VCC 8 A18 9 A16 10 A15 ...

Page 3

... Device Operation 4.1 Read The AT49BV040A is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever high. This dual-line con- trol gives designers flexibility in preventing bus contention. 3358C– ...

Page 4

... The program cycle has addresses latched on the falling edge CE, whichever occurs last, and the data latched on the rising edge CE, whichever occurs first. Programming is completed after the specified t indicate the end of a program cycle. AT49BV040A 4 6. The command sequences are written by applying a low “Command Definition Table” on page cycle time ...

Page 5

... DATA Polling The AT49BV040A features DATA polling to indicate the end of a program cycle. During a pro- gram cycle an attempted read of the last byte loaded will result in the complement of the loaded data on I/O7. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin ...

Page 6

... Temperature Under Bias................................ -55°C to +125°C Storage Temperature ..................................... -65°C to +150°C All Input Voltages (including NC Pins) with Respect to Ground ...................................-0.6V to +6.25V All Output Voltages with Respect to Ground .............................-0. Voltage on OE with Respect to Ground ...................................-0.6V to +13.5V AT49BV040A 6 1st Bus 2nd Bus 3rd Bus Cycle Cycle Cycle Data ...

Page 7

... A18 = A18 = A18 = V IH Entry/Exit”. Condition MHz OUT -400 µA OH AT49BV040A AT49BV040A-90 -40°C - 85°C 2.7V - 3. OUT High Z High Z X High Z ( Manufacturer Code Device Code H IH Manufacturer Code IL Device Code IL Min Max 0.6 2.0 0.45 2.4 ...

Page 8

... This parameter is characterized and is not 100% tested. AT49BV040A 8 AT49BV040A-70 Min (1)(2)(3)(4) ADDRESS VALID ACC HIGH after the address transition without impact on t ACC after the falling edge of CE without impact AT49BV040A-90 Max Min Max OUTPUT VALID . ACC after an address change CE ACC ...

Page 9

... DRIVING LEVELS < 13. Output Load Test 14. Pin Capacitance ( MHz 25°C Symbol Typ OUT Note: 1. This parameter is characterized and is not 100% tested. 3358C–FLASH–3/05 2.4V AC 1.5V 0.4V 3.0V 1.8K OUTPUT PIN 30 pF 1.3K Max 6 12 AT49BV040A AC MEASUREMENT LEVEL Units Conditions OUT 9 ...

Page 10

... Chip Select Hold Time CH t Write Pulse Width ( Data Set-up Time Data, OE Hold Time DH OEH t Write Pulse Width High WPH 16. AC Byte Load Waveforms 16.1 WE Controlled OE ADDRESS CE WE DATA IN 16.2 CE Controlled OE ADDRESS WE CE DATA IN AT49BV040A 10 t OES t OEH OES t OEH ...

Page 11

... Definition Table” on page 3. For chip erase, the data should be 10H, and for sector erase, the data should be 30H. 3358C–FLASH–3/ WPH 555 AAA 555 555 BYTE 0 BYTE 1 BYTE 2 6.) AT49BV040A Min Typ Max AAA Note Note 3 AA BYTE 3 BYTE 4 BYTE 5 Units 50 µs ...

Page 12

... I/O6 Notes: 1. Toggling either both OE and CE will operate toggle bit. The t specification must be met by the toggling input(s). OEHP 2. Beginning and ending state of I/O6 will vary. 3. Any address location may be used but the address should not vary. AT49BV040A OEH t OE HIGH Z An ...

Page 13

... LOAD DATA F0 TO ANY ADDRESS Notes: 1. Data Format: I/O7 - I/O0 (Hex); EXIT PRODUCT 2. Boot block lockout feature enabled. IDENTIFICATION (4) MODE ; AT49BV040A (1) LOAD DATA AA TO ADDRESS 555 LOAD DATA 55 TO ADDRESS AAA LOAD DATA 80 TO ADDRESS 555 LOAD DATA AA TO ADDRESS 555 ...

Page 14

... AT49BV040A-70TI 32T AT49BV040A-70VI 32V AT49BV040A-90JI 32J AT49BV040A-90TI 32T AT49BV040A-90VI 32V Ordering Code Package AT49BV040A-70JU 32J AT49BV040A-70TU 32T AT49BV040A-90TU 32T AT49BV040A-90VU 32V Package Type Operation Range Industrial (-40° to 85°C) Industrial (-40° to 85°C) Operation Range Industrial (-40° to 85°C) Industrial (-40° ...

Page 15

... Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R 3358C–FLASH–3/05 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER TITLE 32J, 32-lead, Plastic J-leaded Chip Carrier (PLCC) AT49BV040A 0.318(0.0125) 0.191(0.0075 COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX SYMBOL A 3.175 – ...

Page 16

... E Notes: 1. This package conforms to JEDEC reference MO-142, Variation BD. 2. Dimensions D1 and E do not include mold protrusion. Allowable protrusion 0.15 mm per side and 0.25 mm per side. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT49BV040A 16 PIN SEATING PLANE A1 TITLE ...

Page 17

... Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R 3358C–FLASH–3/05 PIN SEATING PLANE A1 TITLE 32V, 32-lead ( Package) Plastic Thin Small Outline Package, Type I (VSOP) AT49BV040A 0º ~ 8º GAGE PLANE COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A – – ...

Page 18

... Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDI- TIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT ...

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