AT49BV163AT-55CU Atmel, AT49BV163AT-55CU Datasheet - Page 6

• Manufacturer Part Number: AT49BV163AT-55CU
• Description: IC FLASH 16MBIT 55NS 48CBGA
• Manufacturer: Atmel

Specifications of AT49BV163AT-55CU

• Format - Memory: FLASH
• Memory Type: FLASH
• Memory Size: 16M (2M x 8 or 1M x 16)
• Speed: 55ns
• Interface: Parallel
• Voltage - Supply: 2.65 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-CBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.7
4.7.1
4.7.2
6
Program/Erase Status
AT49BV162/163A(T)
DATA Polling
Toggle Bit
The device provides several bits to determine the status of a program or erase operation: I/O2,
I/O3, I/O5, I/O6 and I/O7. The
describe the function of these bits. To provide greater flexibility for system designers, the
AT49BV162A(T)/163A(T) contains a programmable configuration register. The configuration
register allows the user to specify the status bit operation. The configuration register can be set
to one of two different values, “00” or “01”. If the configuration register is set to “00”, the part will
automatically return to the read mode after a successful program or erase operation. If the con-
figuration register is set to a “01”, a Product ID Exit command must be given after a successful
program or erase operation before the part will return to the read mode. It is important to note
that whether the configuration register is set to a “00” or to a “01”, any unsuccessful program or
erase operation requires using the Product ID Exit command to return the device to read mode.
The default value (after power-up) for the configuration register is “00”. Using the four-bus cycle
Set Configuration Register command as shown in the
the value of the configuration register can be changed. Voltages applied to the RESET pin will
not alter the value of the configuration register. The value of the configuration register will affect
the operation of the I/O7 status bit as described below.
The AT49BV162A(T)/163A(T) features Data Polling to indicate the end of a program cycle. If the
status configuration register is set to a “00”, during a program cycle an attempted read of the last
byte/word loaded will result in the complement of the loaded data on I/O7. Once the program
cycle has been completed, true data is valid on all outputs and the next cycle may begin. During
a chip or sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the
program or erase cycle has completed, true data will be read from the device. Data Polling may
begin at any time during the program cycle. Please see
details.
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has completed
a program or erase operation. Once I/O7 has gone high, status information on the other pins can
be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
bit as shown in the algorithm in
In addition to Data Polling the AT49BV162A(T)/163A(T) provides another method for determin-
ing the end of a program or erase cycle. During a program or erase operation, successive
attempts to read data from the memory will result in I/O6 toggling between one and zero. Once
the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining
the toggle bit may begin at any time during a program cycle. Please see
page 12
The toggle bit status bit should be used in conjunction with the erase/program and V
as shown in the algorithm in
for more details.
Figures 4-3 and
Figures 4-1 and
“Status Bit Table” on page 12
and
and
4-4
4-2
on
“Command Definition Table” on page
on
page
“Status Bit Table” on page 12
page
11.
and the following four sections
10.
“Status Bit Table” on
3349H–FLASH–3/05
PP
status bit
PP
for more
status
13,