AT25DF041A-SSH-B Atmel, AT25DF041A-SSH-B Datasheet - Page 9

• Manufacturer Part Number: AT25DF041A-SSH-B
• Description: IC FLASH 4MBIT 70MHZ 8SOIC
• Manufacturer: Atmel

Specifications of AT25DF041A-SSH-B

• Format - Memory: FLASH
• Memory Type: DataFLASH
• Memory Size: 4M (2048 pages x 256 bytes)
• Speed: 70MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Architecture: Sectored
• Interface Type: SPI Serial
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Maximum Operating Current: 12 mA
• Mounting Style: SMD/SMT
• Organization: 8 KB x 2
• Ic Interface Type: Serial, SPI
• Clock Frequency: 70MHz
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: SOIC
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8. Program and Erase Commands
8.1
3668D–DFLASH–9/08
Byte/Page Program
The Byte/Page Program command allows anywhere from a single byte of data to 256 bytes of
data to be programmed into previously erased memory locations. An erased memory location is
one that has all eight bits set to the logical “1” state (a byte value of FFh). Before a Byte/Page
Program command can be started, the Write Enable command must have been previously
issued to the device (see
Enable Latch (WEL) bit of the Status Register to a logical “1” state.
To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device
followed by the three address bytes denoting the first byte location of the memory array to begin
programming at. After the address bytes have been clocked in, data can then be clocked into the
device and will be stored in an internal buffer.
If the starting memory address denoted by A23 - A0 does not fall on an even 256-byte page
boundary (A7 - A0 are not all 0’s), then special circumstances regarding which memory locations
will be programmed will apply. In this situation, any data that is sent to the device that goes
beyond the end of the page will wrap around back to the beginning of the same page. For exam-
ple, if the starting address denoted by A23 - A0 is 0000FEh, and three bytes of data are sent to
the device, then the first two bytes of data will be programmed at addresses 0000FEh and
0000FFh while the last byte of data will be programmed at address 000000h. The remaining
bytes in the page (addresses 000001h through 0000FDh) will be unaffected and will not change.
In addition, if more than 256 bytes of data are sent to the device, then only the last 256 bytes
sent will be latched into the internal buffer.
When the CS pin is deasserted, the device will take the data stored in the internal buffer and pro-
gram it into the appropriate memory array locations based on the starting address specified by
A23 - A0 and the number of data bytes sent to the device. If less than 256 bytes of data were
sent to the device, then the remaining bytes within the page will not be altered. The program-
ming of the data bytes is internally self-timed and should take place in a time of t
The three address bytes and at least one complete byte of data must be clocked into the device
before the CS pin is deasserted, and the CS pin must be deasserted on even byte boundaries
(multiples of eight bits); otherwise, the device will abort the operation and no data will be pro-
grammed into the memory array. In addition, if the address specified by A23 - A0 points to a
memory location within a sector that is in the protected state (see section
page
to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be
reset back to the logical “0” state if the program cycle aborts due to an incomplete address being
sent, an incomplete byte of data being sent, or because the memory location to be programmed
is protected.
While the device is programming, the Status Register can be read and will indicate that the
device is busy. For faster throughput, it is recommended that the Status Register be polled
rather than waiting the t
At some point before the program cycle completes, the WEL bit in the Status Register will be
reset back to the logical “0” state.
The device also incorporates an intelligent programming algorithm that can detect when a byte
location fails to program properly. If a programming error arises, it will be indicated by the EPE
bit in the Status Register.
16), then the Byte/Page Program command will not be executed, and the device will return
BP
or t
“Write Enable” on page 15
PP
time to determine if the data bytes have finished programming.
command description) to set the Write
AT25DF041A
“Protect Sector” on
PP
.
9