MT29F8G08FACWP:C TR Micron Technology Inc, MT29F8G08FACWP:C TR Datasheet - Page 9

• Manufacturer Part Number: MT29F8G08FACWP:C TR
• Description: IC FLASH 8GBIT 48TSOP
• Manufacturer: Micron Technology Inc

Specifications of MT29F8G08FACWP:C TR

• Format - Memory: FLASH
• Memory Type: FLASH - Nand
• Memory Size: 8G (1G x 8)
• Interface: Parallel
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-TSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Speed: -

Architecture
Addressing
PDF: 09005aef814b01a2 / Source: 09005aef814b01c7
2_4_8gb_nand_m49a__2.fm - Rev. D 12/06 EN
These devices use NAND Flash electrical and command interfaces. Data, commands,
and addresses are multiplexed onto the same pins to provide a memory device with a
low pin count.
The internal memory array is accessed on a page basis. During reads, a page of data is
copied from the memory array into the data register. Once copied to the data register,
data is output sequentially, byte by byte on x8 devices, or word by word on x16 devices.
The memory array is programmed on a page basis. After the starting address is loaded
into the internal address register, data is sequentially written to the internal data register
up to the end of a page. After all of the page data has been loaded into the data register,
array programming is started.
In order to increase programming bandwidth, this device incorporates a cache register.
In the cache programming mode, data is first copied into the cache register and then
into the data register. When the data is copied into the data register, programming
begins.
After the data register has been loaded and programming has started, the cache register
becomes available for loading of additional data. Loading of the next page of data into
the cache register takes place while page programming is in process.
The INTERNAL DATA MOVE command also uses the internal cache register. Normally,
moving data from one area of external memory to another uses a large number of exter-
nal memory cycles. With the use of the internal cache register and data register, array
data can be copied from one page and then programmed into another without the use of
external memory cycles.
NAND Flash devices do not contain dedicated address pins. Addresses are loaded using
a five-cycle sequence, as shown in Tables 4 and 5 on pages 12 and 13. See Figures 5 and 6
on pages 10 and 11 for additional memory mapping and addressing details.
9
2Gb, 4Gb, 8Gb: x8, x16 NAND Flash Memory
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2005 Micron Technology, Inc. All rights reserved.
Architecture