MT48H16M16LFBF-75:G TR Micron Technology Inc, MT48H16M16LFBF-75:G TR Datasheet - Page 29
![IC SDRAM 256MBIT 132MHZ 54VFBGA](/photos/7/22/72286/557-54-fbga_sml.jpg)
MT48H16M16LFBF-75:G TR
Manufacturer Part Number
MT48H16M16LFBF-75:G TR
Description
IC SDRAM 256MBIT 132MHZ 54VFBGA
Manufacturer
Micron Technology Inc
Type
Mobile SDRAMr
Specifications of MT48H16M16LFBF-75:G TR
Format - Memory
RAM
Memory Type
Mobile SDRAM
Memory Size
256M (16Mx16)
Speed
132MHz
Interface
Parallel
Voltage - Supply
1.7 V ~ 1.95 V
Operating Temperature
0°C ~ 70°C
Package / Case
54-VFBGA
Organization
16Mx16
Density
256Mb
Address Bus
15b
Access Time (max)
8/6ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
1.8V
Package Type
VFBGA
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
1.95V
Operating Supply Voltage (min)
1.7V
Supply Current
80mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
557-1326-2
READ
Figure 9: READ Command
PDF: 09005aef834c13d2
256mb_mobile_sdram_y36n.pdf - Rev. I 11/09 EN
Note:
The READ command is used to initiate a burst read access to an active row. The values
on the BA0 and BA1 inputs select the bank; the address provided selects the starting
column location. The value on input A10 determines whether auto precharge is used. If
auto precharge is selected, the row being accessed is precharged at the end of the READ
burst; if auto precharge is not selected, the row remains open for subsequent accesses.
Read data appears on the DQ subject to the logic level on the DQM inputs two clocks
earlier. If a given DQM signal was registered HIGH, the corresponding DQ will be High-
Z two clocks later; if the DQM signal was registered LOW, the DQ will provide valid data.
BA0, BA1
Address
1. EN AP = enable auto precharge, DIS AP = disable auto precharge.
RAS#
CAS#
A10
WE#
CKE
CLK
CS#
1
HIGH
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile SDRAM
Column address
Bank address
DIS AP
EN AP
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