M24256-BWMN6T STMicroelectronics, M24256-BWMN6T Datasheet - Page 20

• Manufacturer Part Number: M24256-BWMN6T
• Description: IC EEPROM 256KBIT 400KHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M24256-BWMN6T

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 256K (32K x 8)
• Speed: 400kHz
• Interface: I²C, 2-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 497-1601-2

Device operation
3.15
3.16
3.17
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Current Address Read (in memory array)
For the Current Address Read operation, following a Start condition, the bus master only
sends a device select code with the Read/Write bit (RW) set to 1. The device acknowledges
this, and outputs the byte addressed by the internal address counter. The counter is then
incremented. The bus master terminates the transfer with a Stop condition, as shown in
Figure
Sequential Read
This operation can be used after a Current Address Read or a Random Address Read. The
bus master does acknowledge the data byte output, and sends additional clock pulses so
that the device continues to output the next byte in sequence. To terminate the stream of
bytes, the bus master must not acknowledge the last byte, and must generate a Stop
condition, as shown in
The output data comes from consecutive addresses, with the internal address counter
automatically incremented after each byte output. After the last memory address, the
address counter ‘rolls-over’, and the device continues to output data from memory address
00h.
Reading the Identification Page (M24256-D only)
The Identification Page (64 bytes) is an additional page which can be written and (later)
permanently locked in Read-only mode.
The Identification Page can be read by issuing a Read Identification Page instruction. This
instruction uses the same protocol and format as the Random Address Read (from memory
array) with device type identifier defined as 1011b. The MSB address bits A17/A6 are don't
care, the LSB address bits A5/A0 define the byte address inside the Identification Page. The
number of bytes to read in the ID page must not exceed the page boundary, otherwise
unexpected data will be read (e.g.: when reading the Identification Page from location 10d,
the number of bytes should be less than or equal to 54, as the ID page boundary is
64 bytes).
11, without acknowledging the byte.
Figure
11.
Doc ID 6757 Rev 23
M24256-BF, M24256-BR, M24256-BW, M24256-DR