CY7C025AV-20AXI Cypress Semiconductor Corp, CY7C025AV-20AXI Datasheet - Page 15

• Manufacturer Part Number: CY7C025AV-20AXI
• Description: IC SRAM 128KBIT 20NS 100LQFP
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C025AV-20AXI

• Format - Memory: RAM
• Memory Type: SRAM - Dual Port, Asynchronous
• Memory Size: 128K (8K x 16)
• Speed: 20ns
• Interface: Parallel
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Density: 128Kb
• Access Time (max): 20ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 13b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 2
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 16b
• Number Of Words: 8K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Switching Waveforms
Document #: 38-06052 Rev. *M
Left Address Valid First:
CE
Right Address Valid First:
CE
Note
48. If t
ADDRESS
ADDRESS
R
L
Valid First
ADDRESS
ADDRESS
ADDRESS
ADDRESS
Valid First:
PS
BUSY
BUSY
BUSY
BUSY
is violated, the busy signal is asserted on one side or the other, but there is no guarantee to which side BUSY is asserted.
CE
CE
CE
CE
L,R
L,R
R
R
R
L
L
L
R
L
R
R
L
L
Figure 15. Busy Timing Diagram No.2 (Address Arbitration)
(continued)
Figure 14. Busy Timing Diagram No.1 (CE Arbitration)
t
t
PS
PS
ADDRESS MATCH
ADDRESS MATCH
t
t
RC
RC
or t
or t
t
t
PS
PS
WC
WC
t
t
BLA
BLA
ADDRESS MATCH
ADDRESS MATCH
t
t
BLC
BLC
ADDRESS MISMATCH
ADDRESS MISMATCH
t
t
BHA
BHA
CY7C024AV/024BV/025AV/026AV
t
t
BHC
BHC
CY7C0241AV/0251AV/036AV
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