CY7C1020B-12ZXC Cypress Semiconductor Corp, CY7C1020B-12ZXC Datasheet - Page 3

IC SRAM 512KBIT 12NS 44TSOP

CY7C1020B-12ZXC

Manufacturer Part Number
CY7C1020B-12ZXC
Description
IC SRAM 512KBIT 12NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1020B-12ZXC

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
512K (32K x 16)
Speed
12ns
Interface
Parallel
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-05171 Rev. *C
AC Test Loads and Waveforms
OUTPUT
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
6. At any given temperature and voltage condition, t
7. t
8. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a write,
Equivalent to: THÉVENIN
INCLUDING
JIG AND
SCOPE
I
and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
Parameter
OL
HZOE
5V
/I
OH
, t
and 30-pF load capacitance.
HZBE
30 pF
, t
[8]
HZCE
(a)
EQUIVALENT
, and t
R 481Ω
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Byte Enable to Data Valid
Byte Enable to Low Z
Byte Disable to High Z
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
Byte Enable to End of Write
HZWE
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
255Ω
OUTPUT
R2
[5]
OUTPUT
Over the Operating Range
Description
INCLUDING
JIG AND
SCOPE
[6]
[6]
[6, 7]
[6]
[6, 7]
5V
[6, 7]
HZCE
30 pF
167
is less than t
5 pF
(b)
R 481Ω
LZCE
, t
HZOE
1.73V
255Ω
is less than t
R2
GND
3.0V
Rise Time: 1 V/ns
LZOE
Min.
CY7C1020B-12
12
12
3
0
3
0
0
9
8
0
0
8
6
0
3
8
, and t
HZWE
is less than t
Max.
12
12
12
6
6
6
6
6
6
10%
90%
LZWE
ALL INPUT PULSES
Min.
CY7C1020B-15
for any given device.
15
15
10
10
10
3
0
3
0
0
0
0
8
0
3
9
CY7C1020B
Max.
15
15
15
7
7
7
7
7
7
Fall Time: 1 V/ns
90%
Page 3 of 9
10%
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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