CY7C1020CV33-10ZXCT Cypress Semiconductor Corp, CY7C1020CV33-10ZXCT Datasheet - Page 4

IC SRAM 512KBIT 10NS 44TSOP

CY7C1020CV33-10ZXCT

Manufacturer Part Number
CY7C1020CV33-10ZXCT
Description
IC SRAM 512KBIT 10NS 44TSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1020CV33-10ZXCT

Format - Memory
RAM
Memory Type
SRAM - Asynchronous
Memory Size
512K (32K x 16)
Speed
10ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-TSOP II
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Document #: 38-05133 Rev. *E
AC Test Loads and Waveforms
Switching Characteristics
OUTPUT
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
BW
4. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
5. At any given temperature and voltage condition, t
6. t
7. This parameter is guaranteed by design and is not tested.
8. The internal Write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE/BLE LOW. CE, WE and BHE/BLE must be LOW to initiate a Write, and
Parameter
[7]
[7]
the transition of these signals can terminate the Write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the Write.
HZOE
3.3V
, t
HZBE
30 pF
, t
[8]
HZCE
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low-Z
OE HIGH to High-Z
CE LOW to Low-Z
CE HIGH to High-Z
CE LOW to Power-up
CE HIGH to Power-down
Byte Enable to Data Valid
Byte Enable to Low-Z
Byte Disable to High-Z
Write Cycle Time
CE LOW to Write End
Address Set-up to Write End
Address Hold from Write End
Address Set-up to Write Start
WE Pulse Width
Data Set-up to Write End
Data Hold from Write End
WE HIGH to Low-Z
WE LOW to High-Z
Byte Enable to End of Write
R 317Ω
(a)
HZWE
are specified with a load capacitance of 5 pF as in part (c) of AC Test Loads. Transition is measured ± 500 mV from steady-state voltage.
351Ω
R2
Description
Over the Operating Range
[5]
[5]
GND
3.0V
[5, 6]
[5]
[5, 6]
[5, 6]
Rise Time: 1 V/ns
[4]
HZCE
is less than t
10%
LZCE
90%
ALL INPUT PULSES
, t
HZOE
[4]
Min.
10
10
is less than t
3
0
3
0
0
8
7
0
0
7
5
0
3
7
(b)
-10
Max.
LZOE
10
10
10
5
5
5
5
5
5
, and t
Fall Time: 1 V/ns
90%
HZWE
10%
Min.
12
12
3
0
3
0
0
9
8
0
0
8
6
0
3
8
is less than t
-12
Max.
LZWE
12
12
12
OUTPUT
6
6
6
6
6
6
High-Z characteristics:
for any given device.
3.3V
CY7C1020CV33
Min.
(c)
15
15
10
10
10
3
0
3
0
0
0
0
8
0
3
9
5 pF
-15
R 317 Ω
Max.
15
15
15
7
7
7
7
7
7
Page 4 of 9
Unit
351Ω
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
R2
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