CY14B256L-SP35XIT Cypress Semiconductor Corp, CY14B256L-SP35XIT Datasheet - Page 15
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CY14B256L-SP35XIT
Manufacturer Part Number
CY14B256L-SP35XIT
Description
IC NVSRAM 256KBIT 35NS 48SSOP
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY14B256L-SP35XC.pdf
(22 pages)
Specifications of CY14B256L-SP35XIT
Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
256K (32K x 8)
Speed
35ns
Interface
Parallel
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
48-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Hardware STORE Cycle
Switching Waveforms
Document Number: 001-54707 Rev. *F
Notes
t
t
t
30. This is the amount of time it takes to take action on a soft sequence command. Vcc power must remain HIGH to effectively register command.
31. Commands such as STORE and RECALL lock out I/O until operation is complete which further increases this time. See the specific command.
32. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware STORE takes place.
DHSB
PHSB
SS
[30, 31]
DQ (Data Out)
Parameters
HSB (OUT)
HSB (OUT)
Address
Write latch not set
Write latch set
HSB (IN)
HSB (IN)
V
CE
CC
RWI
RWI
Address #1
t
SA
HSB to output active time when write latch is not set
Hardware STORE pulse width
Soft sequence processing time
t
DELAY
Soft Sequence
t
t
PHSB
DELAY
t
PHSB
Command
Figure 13. Soft Sequence Processing
Figure 12. Hardware STORE Cycle
Address #6
t
DHSB
t
CW
Description
t
SS
t
STORE
t
DHSB
Address #1
Soft Sequence
100 kOhm resistor,
SRAM is disabled as long as HSB (IN) is driven low.
HSB pin is driven high to
HSB driver is disabled
Command
[32]
[30, 31]
Address #6
t
CW
t
LZHSB
t
HHHD
V
CC
t
SS
Min
CY14B256LA
15
only by Internal
–
–
CY14B256LA
Max
100
25
–
Page 15 of 22
Unit
ns
ns
μs
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