M27V160-100K1 STMicroelectronics, M27V160-100K1 Datasheet - Page 10

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M27V160-100K1

Manufacturer Part Number
M27V160-100K1
Description
IC OTP 16MBIT 100NS 44PLCC
Manufacturer
STMicroelectronics
Datasheet

Specifications of M27V160-100K1

Format - Memory
EPROMs
Memory Type
OTP EPROM
Memory Size
16M (2M x 8 or 1M x 16)
Speed
100ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Device description
2.6
2.7
2.8
10/26
Program Inhibit
Program Verify
Presto III programming algorithm
The Presto III Programming Algorithm allows the whole array to be programed with a
guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of
applying a sequence of 50µs program pulses to each word until a correct Verify occurs (see
Figure
During programing and verify operation a Margin Mode circuit is automatically activated to
guarantee that each cell is programed with enough margin. No overprogram pulse is applied
since the Verify in Margin Mode at V
margin to each programmed cell.
Figure 5.
Programming of multiple M27V160s in parallel with different data is also easily
accomplished. Except for E, all like inputs including G of the parallel M27V160 may be
common. A TTL low level pulse applied to a M27V160's E input and V
program that M27V160. A high level E input inhibits the other M27V160s from being
programmed.
A verify (read) should be performed on the programmed bits to determine that they were
correctly programmed. The verify is accomplished with E at V
and V
CC
5.).
at 6.25V.
Programming Flowchart
YES
NO
= 25
FAIL
++n
V CC = 6.25V, V PP = 12.5V
CC
CHECK ALL WORDS
NO
BYTEV PP =V IH
1st: V CC = 5V
E = 50 s Pulse
2nd: V CC = 3V
much higher than 3.6V provides the necessary
VERIFY
n = 0
Addr
Last
YES
YES
NO
++ Addr
AI00901B
IH
and G at V
PP
at 12.5V, will
IL
, V
PP
M27V160
at 12.5V

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