M95080-WMN6P STMicroelectronics, M95080-WMN6P Datasheet - Page 38

• Manufacturer Part Number: M95080-WMN6P
• Description: IC EEPROM 8KBIT 10MHZ 8SOIC
• Manufacturer: STMicroelectronics

Specifications of M95080-WMN6P

• Format - Memory: EEPROMs - Serial
• Memory Type: EEPROM
• Memory Size: 8K (1K x 8)
• Speed: 10MHz
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 2.5 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Memory Configuration: 1024 X 8
• Interface Type: Serial, SPI
• Clock Frequency: 10MHz
• Supply Voltage Range: 2.5V To 5.5V
• Memory Case Style: SO
• No. Of Pins: 8
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-8605-5; M95080-WMN6P

M95160, M95080
REVISION HISTORY
Table 32. Document Revision History
38/39
21-Sept-2005
04-Nov-2002
13-Nov-2002
21-Nov-2003
06-Feb-2002
08-Jun-2004
18-Oct-2002
07-Oct-2004
19-Jul-2001
Date
Rev.
1.1
1.4
1.0
1.2
1.3
2.0
3.0
4.0
5.0
Document written from previous M95640/320/160/080 datasheet
Announcement made of planned upgrade to 10MHz clock for the 5V, –40 to 85°C, range
TSSOP8 (3x3mm body size, MSOP8) package added
New products, identified by the process letter W, added
Correction to footnote in Ordering Information table
Table of contents, and Pb-free options added. V
MLP8 package added. Absolute Maximum Ratings for V
Soldering temperature information clarified for RoHS compliant devices. Device Grade 3
clarified, with reference to HRCF and automotive environments. Process identification letter
“G” information added. SO8 narrow and TSSOP8 Package mechanical specifications
updated.
Product List summary table added. AEC-Q100-002 compliance. tHHQX corrected to tHHQV.
10MHz, 5ms Write is now the present product. tCH+tCL<1/fC constraint clarified
Added 20MHz and -S product information. Removed DIP package. Info on Pull-up resistors,
VCC lines and Note
Device Internal Reset
020C. Process info updated in
Information
Scheme.
2.
paragraph clarified. Packages compliant with the JEDEC Std J-STD-
added to
DC AND AC PARAMETERS
Figure 4., Bus Master and Memory Devices on the SPI
Description of Revision
IL
(min) improved to –0.45V
IO
(min) and V
and
Table 31., Ordering
CC
(min) improved.
Bus.