HYB18T512160BF-2.5 Qimonda, HYB18T512160BF-2.5 Datasheet - Page 11

• Manufacturer Part Number: HYB18T512160BF-2.5
• Description: IC DDR2 SDRAM 512MBIT 84TFBGA
• Manufacturer: Qimonda

Specifications of HYB18T512160BF-2.5

• Format - Memory: RAM
• Memory Type: DDR2 SDRAM
• Memory Size: 512M (32Mx16)
• Speed: 400MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: 0°C ~ 95°C
• Package / Case: 84-TFBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 675-1016-2

2.2
The chip configuration of a DDR2 SDRAM is listed by function in
columns are explained in
Rev. 1.2, 2007-11
03292006-YBYM-WG0Z
Ball#
Clock Signals ×16 Organization
J8
K8
K2
Control Signals ×16 Organization
K7
L7
K3
L8
Address Signals ×16 Organization
L2
L3
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
Data Signals ×16 Organization
G8
G2
H7
H3
H1
H9
Name
CK
CK
CKE
RAS
CAS
WE
CS
BA0
BA1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
AP
A11
A12
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
Configuration for TFBGA-84
Table 7
Ball
Type
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
I/O
and
Table 8
Buffer
Type
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
SSTL
respectively.
Function
Clock Signal CK, CK
Clock Enable
Row Address Strobe (RAS), Column Address Strobe (CAS),
Write Enable (WE)
Chip Select
Bank Address Bus 1:0
Address Signal 12:0, Address Signal 10/Autoprecharge
Data Signal Lower Byte 7:0
11
Table
6. The abbreviations used in the Ball#/Buffer Type
512-Mbit Double-Data-Rate-Two SDRAM
HYB18T512[40/80/16]0BF
Internet Data Sheet
Configuration
TABLE 6