DS3050W-100# Maxim Integrated Products, DS3050W-100# Datasheet - Page 16

IC NVSRAM 4MBIT 100NS 256BGA

DS3050W-100#

Manufacturer Part Number
DS3050W-100#
Description
IC NVSRAM 4MBIT 100NS 256BGA
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS3050W-100#

Format - Memory
RAM
Memory Type
NVSRAM (Non-Volatile SRAM)
Memory Size
4M (512K x 8)
Speed
100ns
Interface
Parallel
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
256-BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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The watchdog timer can be used to detect an out-of-
control processor. The user programs the watchdog
timer by setting the desired timeout delay into the
WATCHDOG register. The five high-order WATCHDOG
register bits store a binary multiplier and the two lower-
order WATCHDOG bits select the resolution, where 00
=
= 4 seconds. The watchdog timeout value is then
determined by multiplication of the 5-bit multiplier value
with the 2-bit resolution value. (For example: writing
00001110 (0Eh) into the WATCHDOG register = 3 x 1
second, or 3 seconds.) If the processor does not reset
the timer within the specified period, the watchdog flag
(WF) is set to a 1 and a processor interrupt is generat-
ed and stays active until either WF is read or the
WATCHDOG register is read or written.
The MSB of the WATCHDOG register is the watchdog
steering bit (WDS). When WDS is set to a 0, the watch-
dog activates the IRQ/FT output when the watchdog
times out. WDS should not be written to a 1, and should
be initialized to a 0 if the watchdog function is enabled.
The watchdog timer resets when the processor per-
forms a read or write of the WATCHDOG register. The
timeout period then starts over. The watchdog timer is
disabled by writing a value of 00h to the WATCHDOG
register. The watchdog function is automatically dis-
abled upon power-up and the WATCHDOG register is
cleared to 00h.
The DS3050W module is trimmed at the factory to an
accuracy of 1 minute per month at +25°C.
Upon each application of power to the device, the fol-
lowing register bits are automatically set to 0:
WDS = 0, BMB0–BMB4 = 0, RB0 = 0, RB1 = 0, AE = 0,
ABE = 0.
All other RTC bits are undefined.
The DS3050W provides full functional capability for V
greater than 3.0V and write-protects by 2.8V. Data is
maintained in the absence of V
support circuitry. The NV SRAM constantly monitors
V
automatically write-protects itself. All inputs become
don’t care, and all data outputs become high imped-
ance. As V
power-switching circuit connects the lithium energy
3.3V Single-Piece 4Mb Nonvolatile SRAM
with Clock
16
CC
1
/
16
. Should the supply voltage decay, the NV SRAM
____________________________________________________________________
second, 01 =
CC
falls below approximately 2.5V (V
1
Using the Watchdog Timer
/
4
Power-On Default States
second, 10 = 1 second, and 11
Data-Retention Mode
CC
Clock Accuracy
without additional
SW
), the
CC
source to the clock and SRAM to maintain time and
retain data. During power-up, when V
V
to the clock and SRAM, and disconnects the lithium
energy source. Normal clock or SRAM operation can
resume after V
of t
When V
charge the battery. The UL-approved charger circuit
includes short-circuit protection and a temperature-sta-
bilized voltage reference for on-demand charging of
the internal battery. Typical data retention expectations
greater than 2 years per charge cycle are achievable.
A maximum of 96 hours of charging time is required to
fully charge a depleted battery.
When the external V
out-of-tolerance trip point, the output RST is forced
active (low). Once active, the RST is held active until
the V
tery. On power-up, the RST output is held active until
the external supply is greater than the selected trip
point and one reset timeout period (t
This is sufficiently longer than t
RTC and SRAM are ready for access by the micro-
processor.
The DS3050W is shipped from Dallas Semiconductor
with the RTC oscillator disabled and the lithium battery
electrically disconnected, guaranteeing that no battery
capacity has been consumed during transit or storage.
As shipped, the lithium battery is ~60% charged, and
no pre-assembly charging operations should be
attempted.
When V
the lithium battery is enabled for backup operation. The
user is required to enable the oscillator (MSB of SEC-
ONDS register) and initialize the required RTC registers
for proper timekeeping operation. A 96 hour initial bat-
tery charge time is recommended for new system
installations.
To achieve the best results when using the DS3050W,
assure that all V
decouple the power supply with a 0.1µF capacitor. Use
a high-quality, ceramic surface-mount capacitor if pos-
SW
REC
, the power-switching circuit connects external V
CC
.
CC
CC
supply has fallen below that of the internal bat-
is greater than V
is first applied at a level greater than V
CC
Applications Information
CC
exceeds V
Freshness Seal and Shipping
and GND balls are connected and
CC
System Power Monitoring
Power-Supply Decoupling
supply falls below the selected
TP
TP
an internal regulator will
for a minimum duration
REC
Battery Charging
RPU
to ensure that the
CC
) has elapsed.
rises above
CC
TP
,

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