EPC2LC20N Altera, EPC2LC20N Datasheet - Page 15

IC CONFIG DEVICE 1.6MBIT 20-PLCC

EPC2LC20N

Manufacturer Part Number
EPC2LC20N
Description
IC CONFIG DEVICE 1.6MBIT 20-PLCC
Manufacturer
Altera
Series
EPCr
Datasheet

Specifications of EPC2LC20N

Programmable Type
In System Programmable
Memory Size
1.6Mb
Voltage - Supply
3 V ~ 3.6 V, 4.75 V ~ 5.25 V
Operating Temperature
0°C ~ 70°C
Package / Case
20-PLCC
Memory Type
Flash
Clock Frequency
66.7MHz
Supply Voltage Range
3V To 5.25V
Memory Case Style
LCC
No. Of Pins
20
Operating Temperature Range
0°C To +70°C
Rohs Compliant
Yes
For Use With
PLMJ1213 - PROGRAMMER ADAPTER 20 PIN J-LEAD
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-1376-5
EPC2LC20N

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Chapter 4: Configuration Devices for SRAM-Based LUT Devices Data Sheet
IEEE Std. 1149.1 (JTAG) Boundary-Scan Testing
© December 2009
Altera Corporation
Figure 4–4
Figure 4–4. EPC2 JTAG Waveforms
Table 4–7
Table 4–7. JTAG Timing Parameters and Values
t
t
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Symbol
Captured
shows the timing parameters and values for configuration devices.
Driven
Signal
Signal
shows the timing requirements for the JTAG signals.
to be
to be
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high-impedance to valid
output
Update register valid output to high
impedance
TMS
TDO
TCK
TDI
t
JCH
t
JSZX
t
JPZX
Parameter
t
JCP
t
JSSU
t
JCL
t
JSH
t
t
JPCO
JSCO
t
JPSU
Configuration Handbook (Complete Two-Volume Set)
Min
100
20
45
50
50
20
45
t
t
JPH
JSXZ
t
JPXZ
Max
25
25
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4–15

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