AT17F080-30BJC Atmel, AT17F080-30BJC Datasheet - Page 5
![IC FLASH CONFIG 8M 44PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
AT17F080-30BJC
Manufacturer Part Number
AT17F080-30BJC
Description
IC FLASH CONFIG 8M 44PLCC
Manufacturer
Atmel
Datasheet
1.AT17F040-30JU.pdf
(19 pages)
Specifications of AT17F080-30BJC
Programmable Type
FLASH
Memory Size
8Mb
Voltage - Supply
2.97 V ~ 3.63 V
Operating Temperature
0°C ~ 70°C
Package / Case
44-LCC (J-Lead)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
5. Pin Description
Table 5-1.
5.1
5.2
5.3
3039K–CNFG–2/08
Name
DATA
CLK
PAGE_EN
PAGESEL0
PAGESEL1
RESET/OE
CE
GND
CEO
A2
READY
SER_EN
V
CC
DATA
CLK
PAGE_EN
(1)
Pin Description
(1)
(2)
I/O
I/O
O
O
–
–
I
I
I
I
I
I
I
I
Three-state DATA output for configuration. Open-collector bi-directional pin for programming.
Clock input. Used to increment the internal address and bit counter for reading and
programming.
Input used to enable page download mode. When PAGE_EN is high the configuration download
address space is partitioned into 4 equal pages. This gives users the ability to easily store and
retrieve multiple configuration bitstreams from a single configuration device. This input works in
conjunction with the PAGESEL inputs. PAGE_EN must be remain low if paging is not desired.
When SER_EN is Low (ISP mode) this pin has no effect.
Notes:
1. This pin has an internal 20 KΩ pull-up resistor.
2. This pin has an internal 30 KΩ pull-down resistor.
LAP
8
1
2
–
–
–
3
4
5
6
–
7
8
AT17F040
PLCC
20
16
11
10
14
15
17
20
2
4
7
6
8
20 PLCC
(Virtex)
10
11
13
15
18
20
1
3
–
–
–
8
LAP
8
1
2
–
–
–
3
4
5
6
–
7
8
AT17F080
AT17F040/080
PLCC
20
16
11
10
14
15
17
20
2
4
7
6
8
TQFP
44
40
43
39
14
19
13
15
18
21
23
35
38
5