VIPER15LD STMicroelectronics, VIPER15LD Datasheet - Page 15
![IC OFFLINE CONV PWM OVP 16-SOIC](/photos/1/39/13919/497-16-soic_series_sml.jpg)
VIPER15LD
Manufacturer Part Number
VIPER15LD
Description
IC OFFLINE CONV PWM OVP 16-SOIC
Manufacturer
STMicroelectronics
Series
VIPer™ plusr
Datasheet
1.VIPER15LN.pdf
(40 pages)
Specifications of VIPER15LD
Output Isolation
Isolated
Frequency Range
122 ~ 150kHz
Voltage - Input
8.5 ~ 23.5 V
Voltage - Output
800V
Power (watts)
12W
Operating Temperature
-40°C ~ 150°C
Package / Case
16-SOIC (0.154", 3.90mm Width)
Output Power
1 W
Input Voltage
8.5 V to 23.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
VIPER15LD
Manufacturer:
STM
Quantity:
2 500
Company:
Part Number:
VIPER15LDTR
Manufacturer:
ALTERA
Quantity:
330
VIPER15
7
7.1
7.2
Operation description
VIPER15 is a high-performance low-voltage PWM controller IC with an 800 V, avalanche
rugged power section.
The controller includes the current-mode PWM logic and the ZCD (zero current detect)
circuit for QR operation, the start-up circuitry with soft-start feature, an oscillator for
frequency foldback function, the current limit circuit with adjustable set point, the second
overcurrent circuit, the burst mode management circuit, the brown-out circuit, the UVLO
circuit, the auto-restart circuit and the thermal shutdown circuit.
The current limit set-point is set by the ZCD pin. The burst mode operation guaranties high
performance in the stand-by mode and helps in the energy saving norm accomplishment
All the fault protections are built in auto-restart mode with very low repetition rate to prevent
IC's over heating.
Power section and gate driver
The power section is implemented with an avalanche ruggedness N-channel MOSFET,
which guarantees safe operation within the specified energy rating as well as high dv/dt
capability. The power section has a BV
of 20 Ω at 25 °C.
The integrated SenseFET structure allows a virtually loss-less current sensing.
The gate driver is designed to supply a controlled gate current during both turn-on and turn-
off in order to minimize common mode EMI. Under UVLO conditions an internal pull-down
circuit holds the gate low in order to ensure that the Power section cannot be turned on
accidentally.
High voltage startup generator
The HV current generator is supplied through the DRAIN pin and it is enabled only if the
input bulk capacitor voltage is higher than V
page
delivered to the capacitor on the V
the I
phase.
DDch
7. When the HV current generator is ON, the I
current is reduced to 0.6 mA, in order to have a slow duty cycle during the restart
Doc ID 15455 Rev 5
DD
pin. In case of Auto-restart mode after a fault event,
DSS
of 800 V min. and a typical R
DRAIN_START
DDch
threshold, reported on
current (see
Operation description
Table 7 on page
DS(on)
Table 7 on
7) is
15/40