NCP1207BDR2G ON Semiconductor, NCP1207BDR2G Datasheet - Page 13

IC CTRLR PWM CM OVP OCP HV 8SOIC

NCP1207BDR2G

Manufacturer Part Number
NCP1207BDR2G
Description
IC CTRLR PWM CM OVP OCP HV 8SOIC
Manufacturer
ON Semiconductor
Datasheet

Specifications of NCP1207BDR2G

Output Isolation
Isolated
Voltage - Input
10.6 ~ 20 V
Operating Temperature
-40°C ~ 150°C
Package / Case
8-SOIC (0.154", 3.90mm Width) 7 leads
Number Of Outputs
1
Duty Cycle (max)
28.6 %
Output Current
500 mA
Mounting Style
SMD/SMT
Switching Frequency
75 KHz
Operating Supply Voltage
20 V
Maximum Operating Temperature
+ 150 C
Fall Time
20 ns
Minimum Operating Temperature
- 40 C
Rise Time
40 ns
Synchronous Pin
No
Topology
Flyback
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

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Price
Part Number:
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Manufacturer:
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Quantity:
1 950
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Manufacturer:
ON/安森美
Quantity:
20 000
Soft- -Start
soften the constraints occurring in the power supply during
startup. It is activated during the power on sequence. As
soon as V
increased from nearly zero up to the maximum clamping
level (e.g. 1.0 V). The soft- -start is also activated during the
overcurrent burst (OCP) sequence. Every restart attempt is
followed by a soft- -start activation. Generally speaking, the
soft- -start will be activated when V
zero (fresh power- -on sequence) or 5.3 V, the latchoff
voltage occurring during OCP.
Calculating the VCC Capacitor
depends upon the V
V
on the startup sequence of your system, i.e. when you first
apply the power to the IC. The corresponding transient fault
duration due to the output capacitor charging must be less
than the time needed to discharge from 12 V to 10 V,
otherwise the supply will not properly start. The test consists
in either simulating or measuring in the lab how much time
the system takes to reach the regulation at full load. Let’s
suppose that this time corresponds to 6.0 ms. Therefore a
V
to not trigger the overload detection circuitry. If the
CC
CC
The NCP1207A/B features an internal 1 ms soft- -start to
As the above section describes, the fall down sequence
line to go from 12 V to 10 V? The required time depends
fall time of 10 ms could be well appropriated in order
FAULT FLAG
5.3 V
12 V
10 V
INTERNAL
CC
DRV
V
STARTUP PHASE
reaches VCC
CC
CC
OCCURS HERE
level: how long does it take for the
REGULATION
OFF
, the peak current is gradually
CC
ramps up either from
LATCHOFF
FAULT OCCURS HERE
PULSES
DRIVER
PHASE
http://onsemi.com
FAULT IS
RELAXED
Figure 24.
13
corresponding IC consumption, including the MOSFET
drive, establishes at 1.8 mA (e.g. with an 11 nC MOSFET),
we can calculate the required capacitor using the following
formula:
Δt of 10 ms, C equals 9.0 mF or 22 mF for a standard value.
When an overload condition occurs, the IC blocks its
internal circuitry and its consumption drops to 330 mA
typical. This happens at V
until V
using the calculated 22 mF and 330 mA current consumption,
this latchoff phase lasts: 313 ms.
HV Pin Recommended Protection
controller such as the NCP1207A/B, one instance can occur:
resonance between the primary inductance and the bulk
capacitor. As any CMOS device, the NCP1207A/B is
sensitive to negative voltages that could appear on it’s pins
and could create an internal latch- -up condition.
the bulk capacitor and the V
When the user unplugs a power supply built with a QR
A negative ringing can take place on pin8 due to a
For this reason, we recommend adding a resistor between
TIME
TIME
TIME
CC
Δt = ΔV ⋅ C
reaches 5.3 V: we are in latchoff phase. Again,
i
If the fault is relaxed during the V
natural fall down sequence, the IC
automatically resumes.
If the fault still persists when V
reached VCC
cuts everything off until recovery.
, with ΔV = 2.0 V. Then for a wanted
CC
CC
= 10 V and it remains stuck
ON
pin.
, then the controller
CC
CC

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