S-8243BADFT-TB-G Seiko Instruments, S-8243BADFT-TB-G Datasheet - Page 14

• Manufacturer Part Number: S-8243BADFT-TB-G
• Description: IC LI-ION BATT PROTECT 16-TSSOP
• Manufacturer: Seiko Instruments

Specifications of S-8243BADFT-TB-G

• Function: Over/Under Voltage Protection
• Battery Type: Lithium-Ion (Li-Ion), Lithium-Polymer (Li-Pol)
• Voltage - Supply: 6 V ~ 18 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TSSOP
• Output Voltage: 3.379 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

14
BATTERY PROTECTION IC FOR 3-SERIAL OR 4-SERIAL CELL PACK
S-8243A/B Series
8. Internal resistance (Test circuit 8)
9. Pin current for CTL2 to CTL4, COP, DOP, VBATOUT (Test circuit 9)
The resistance between VDD and VMP is R
pin current after V
The resistance between VSS and VMP is R
pin current at the condition V1 = V2 = V3 = V4 = 1.8 V and V
Starting condition is V1 = V2 = V3 = V4 = 3.5 V.
Pin current for CTL2 at “High” is I
Pin current for CTL2 at “Low” is I
Pin current for CTL3 and CTL4 can be obtained in the same manner as in the CTL2.
Pin current for COP at “High” is I
pin current for COP at “Low” is I
Pin current for DOP at “Low” is I
And pin current for COP at “High” is I
= V
Pin current for VBATOUT at “High” is I
V
OFF3
DD
−0.5 V. And pin current for VBATOUT at “Low” is I
−0.5 V.
V1
V2
V3
V4
A
A
A
V1
V2
V3
V4
A
1 VDD
2 DOP
3 COP
4 VMP
5 VC1
6 VC2
7 VC3
8 VSS
MP
Test circuit 1
Test circuit 3
is changed to V
2 DOP
3 COP
4 VMP
5 VC1
7 VC3
8 VSS
1 VDD
6 VC2
VBATOUT 11
VREG 16
CTL2 14
CTL4 12
CTL1 15
CTL3 13
CDT
CCT 10
VBATOUT 11
9
VREG 16
CTL2 14
CTL4 12
CTL1 15
CTL3 13
CDT 9
CCT 10
COL
COH
DOL
CTL2L
CTL2H
C1=1 μF
and is obtained by setting V1 = V2 = V3 = V4 = 3.5 V, V
and is obtained by setting V1 = V2 = V3 = V4 = 6 V, V
and is obtained by setting V1 = V2 = V3 = V4 = 3.5 V, V
COH
SS
and is obtained by setting V
and is obtained by setting V
from the starting condition V1 = V2 = V3 = V4 = 3.5 V and V
and is obtained by setting V1 = V2 = V3 =V4 = 3.5 V, V
V
VBATH
C1=1 μF
Seiko Instruments Inc.
VDM
VSM
and is obtained by setting CTL3 and CTL4 are open and V
and is calculated by the equation R
and is calculated by the equation R
Figure 5
VBATL
(1 / 2)
MP
and is obtained by setting V
= V
R1=1 MΩ
V
CTL2
CTL2
DD
V
.
= V
= V
SS
V1
V2
V3
V4
OUT
.
.
1 VDD
2 DOP
3 COP
4 VMP
5 VC1
6 VC2
7 VC3
8 VSS
Test circuit 2
Test circuit 4
1 VDD
2 DOP
3 COP
4 VMP
5 VC1
6 VC2
7 VC3
8 VSS
VDM
VSM
VBATOUT 11
= V
= V
VREG 16
CTL2 14
CTL4 12
CTL1 15
CTL3 13
CDT 9
MP
CCT 10
VBATOUT 11
BATOUT
DD
DD
= V
MP
MP
VREG 16
CTL2 14
CTL4 12
CTL1 15
CTL3 13
CDT
CCT 10
/ I
/ I
= V
= V
DD
VDM
VSM
MP
9
= V
C1=1 μF
, and V
DD
DD
= V
where I
where I
OFF3
MP
, and V
, and V
DD
= V
COP
+0.5 V.
−1 V, and V
I
Rev.3.0
OUT
C1=1 μF
V
VDM
VSM
DD
COP
DOP
= V
.
is a VMP
is a VMP
BATOUT
DD
= 0.5 V.
= 0.5 V.
. And
_00
DOP
=