DS2790G+T&R Maxim Integrated Products, DS2790G+T&R Datasheet
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DS2790G+T&R
Specifications of DS2790G+T&R
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DS2790G+T&R Summary of contents
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... DS2790E+ PACK- DS2790G+ (1) Optional for 8kV/15kV ESD Contact factory concerning Mask ROM devices. + Denotes lead-free package. MAXQ is a registered trademark of Maxim Integrated Products, Inc. SMBus is a trademark of Intel Corp Gauge and Protector Accurate Current Measurement for Coulomb Counting (Current Accumulation) 1.5% ±7.8µV over ± 64mV Input Range 1.5% ± ...
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ABSOLUTE MAXIMUM RATINGS PLS to V ................................................................................................................................................ -0.3V to +18V ................................................................................................................................................. -0.3V to +12V ...........................................................................................................................................-0.3V to CP+0. .................................................................................................................................... V SS P0.4, P0 .............................................................................................................................. -0. ...
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PARAMETER P0.0–P0.5 Pulse Rejection Current Measurement Input Range (Full Scale) Current Measurement Resolution Current Measurement Offset Error Current Measurement Gain Error Accumulated Current Offset Temperature Measurement Resolution Temperature Measurement Error Voltage Full Scale Voltage Measurement Resolution Voltage Measurement Error VIN ...
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PARAMETER Undervoltage Detect Charge and Discharge Overcurrent Detect (Limits for Charge Thresholds are Positive, While Discharge is Negative.) Short-Circuit Detect Overvoltage Delay Undervoltage Delay Overcurrent Delay Short-Circuit Delay Secondary Short-Circuit Delay Test Threshold Test Current Pulldown Current, PLS Recovery Charge ...
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PARAMETER Setup Time for STOP Condition Spike Pulse Width that can be Suppressed by Input Filter Clock Low Time-Out Cumulative Clock Low Extend Time for Slave Device Cumulative Clock Low Extend Time for Bus Master SCL, SDA Input Capacitance ELECTRICAL ...
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Figure 1. 2-Wire Bus Timing Diagram Figure 2. JTAG Timing Diagram TCK TMS / TDI TDO V REF DVTH THDX t TLQ ...
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PIN DESCRIPTION PIN NAME 1 N. PLS SCL 8 SDA 9 P0.0 10 P0.1 11 SNS2 12 IS2 13 N.C. 14 N.C. 15 N.C. 16 N.C. 17 IS1 18 SNS1 ...
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FUNCTIONAL DIAGRAM PRECISION ANALOG OSCILLATOR TTCK0:1 CLK DIV P0.3 TIMER/ COUNTER WATCHDOG TIMER SNS1 LITHIUM ION PROTECTOR SNS2 SENSE PLS & CONTROL VDD CC FET DRIVERS DC CP FET CHARGE VDD PUMP VDD_INT VSS VSS_INT VOLTAGE (VIN - AVSS) A/D ...
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DETAILED DESCRIPTION The following is an introduction to the primary features of the DS2790 Programmable 1-Cell Li-Ion Fuel Gauge and Protector. More detailed descriptions of the device features can be found in the errata sheets, and user's guides described later ...
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Memory Organization The DS2790 incorporates several memory areas: • 4k words of utility ROM contain a debugger, program loader, and SHA-1 routines • 4k words of EEPROM memory for application program storage • 256 words of SRAM for storage of ...
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Stack Memory A 16-bit, 16-level internal stack provides storage for program return addresses and general-purpose use. The stack is used automatically by the processor when the CALL, RET, and RETI instructions are executed and interrupts serviced. The stack can also ...
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Activating the JTAG interface and loading the Test Access Port (TAP) with the system programming instruction invokes the bootstrap loader for use over the JTAG interface. Setting the SPE bit to 1 during reset through the JTAG interface executes the ...
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SYSTEM RESET Several reset sources are provided for microcontroller control. Although code execution is halted in the reset state, OSCI continues to run. Power-On Reset - An internal power-on reset circuit enhances system reliability. This circuit forces the device to ...
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DS2790 POWER MODES When power is first applied to the DS2790, a Power-on-Reset (POR) circuit transitions the IC to Brown-Out State where cell voltage is monitored and begins code execution. Firmware determines if the IC switches to ANALOG ...
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REGISTER SET Most functions of the device are controlled by sets of registers. These registers provide a working space for memory operations as well as configuring and addressing peripheral registers on the device. Registers are divided into two major types: ...
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Table 2. System Register Bit Functions REGISTER APC PSF IC IMR SC IIR CKCN WDCN A[n] (0..15) PFX IP SP — — IV LC[0] LC[1] Offs DPC — — GR GR.15 GR.14 GR.13 GR.12 GR.11 GR.10 GR.9 ...
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Table 3. System Register Bit Reset Values REGISTER APC PSF IC IMR SC IIR CKCN WDCN A[n] (0..15 PFX LC[ LC[1] 0 ...
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Table 4. Peripheral Register Map REGISTER INDEX M0 (0h) 00h PO 01h PPU 02h PAF 03h EIC 04h TWSTXD/RXD EINT 05h PROT 06h TC 07h TCC 08h PI 09h — 0Ah — 0Bh — 0Ch — 0Dh — 0Eh — ...
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Table 5. Peripheral Register Bit Functions REGISTER PPU PAF EIC MBOI MSCI EINT BOI SCI PROT COCF DOCF TC THI.7 THI.6 TTC PI ICDT0 ICDT0.15 ICDT0.14 ICDT1 ICDT1.15 ICDT1.14 ICDC ICDF ICDB ICDA ICDA.15 ICDA.14 ICDD ICDD.15 ...
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Table 6. Peripheral Register Reset Values REGISTER PPU PAF EIC 0 0 EINT 0 0 PROT TTC PI ICDT0 0 0 ICDT1 0 0 ICDC ICDF ICDB ICDA 0 0 ICDD 0 ...
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SYSTEM INTERRUPTS Multiple interrupt sources are available for quick response to internal and external events. The MAXQ20 architecture uses a single interrupt vector (IV), single interrupt-service routine (ISR) design. For maximum flexibility, interrupts can be enabled globally, individually ...
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Figure 6. EINT Register Interrupt Sources GENERATOR INTERRUPT INT0 PAF.0/PIE.0 INT1 PAF.1/PIE.1 SCI Ports and Pins SDI SNDI CCI Brown-Out BOI Detector Protection BEI Logic VI A/D Converter CI TI Timer/ TCI Counter MASK DESCRIPTION The interrupt from pin P0.0 ...
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I/O PORTS The DS2790 includes a simple input/output (I/O) data port. From a software perspective, the port appears as a group of Special Function Registers within module M0. The simple I/O port defined for this product is described below: • ...
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Table 8. P0 Interrupt Configuration PIE.x PIT.x PIP Figure 7. Port Pin Schematics Interrupt Disabled Interrupt Enabled, Triggered on Logic Low Interrupt Enabled, Triggered on ...
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PROGRAMMABLE TIMER/COUNTER The Timer/Counter block operates as a simple 8-bit interval timer or counter. The start value is programmable and is automatically reloaded when a rollover occurs. The TMOD bit in the TCC register selects between the counter and timer ...
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Figure 9. 2-Wire Slave Configuration Register (TWSCFG) FIELD BIT ADDR 15:9 8:5 reserved TOUT_LONG 4 TLS_DIS 3 TTO_DIS 2 CMD_HM 1 CMD_HM_DIS 0 Note: The peripheral handles clock extension and Ack/Nack generation without intervention from the MAXQ20 core. Bus timeout ...
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Slave Interrupts An interrupt is generated when any condition that sets an interrupt status register bit occurs, and the corresponding interrupt mask bit in the 2-Wire Slave Interrupt Mask Register (TWSIM) is also set. All 2-wire interrupts are maskable ...
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Both the TXD and RXD FIFOs are flushed when a new command byte is accepted (command handshaking is enabled and the TWSCMD register is not busy, or when command handshaking is disabled). In the TWS FIFO register (TWSFIF), LRX[3:0] reports ...
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Figure 10. 2-Wire Communication Examples 2 I C/SMBus Write Data Sequence Slave Command S Wr Ack Address Byte Potential Clock Extension if Cmd Release Latch Clear, CMD_HM_DIS = 0, and CMD_HM = C/SMBus Read Data Sequence Slave ...
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ANALOG-TO-DIGITAL CONVERSION The DS2790 performs real-time measurements of system temperature, voltage, current, and accumulated current. The DS2790’s analog-to-digital converter is controlled by an internal state machine that sequences the measurements, and stores the results in memory. The conversion results of ...
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Figure 11. Current Register Format 12-bit + sign resolution (13-bit), 88ms update interval MSb “S”: sign bit(s) Figure 12. Average Current Register Format 15-bit + sign resolution (16-bit), 2.8s update interval ...
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Accumulation Blanking In order to avoid the accumulation of small positive offset errors over long periods, an offset blanking filter is provided. The blanking filter is enabled by setting the OBEN bit in the ADC Configuration Register. When OBEN is ...
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Figure 16. Temperature Register Format MSb “S”: sign bit ADC Configuration Register The ADC Configuration register located at word address 600Ah controls current measurement bias and offset blanking as well as current fault limits ...
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LITHIUM-ION PROTECTION For safety, lithium-Ion cell protection functions are handled by a completely independent state machine. Application firmware can disable the protection FETs, but is not able to override the protector and enable the FETs. During active operation (CPU or ...
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The Charge V Configuration register. Discharge Overcurrent, DOC external discharge FET and sets the DOCF bit in the protection register. The discharge current path is not re- established until the voltage on PLS rises ...
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CC = (Overvoltage) and (Undervoltage) and (Overcurrent, Charge Direction) and (Charge Overtemperature if enabled) and (Charge Undertemperature if enabled) and ( and SLEEP Protection Register The Protection Register allows system software to determine if a protection fault condition ...
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CC and the CP voltage. The system designer should consider the following V OCP when selecting external FETs: • Gate to Source voltage. The external FETs must be able to withstand a voltage between ...
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Address 001Fh Field Bit 15:13 Unused UVT 12:8 TLIME 7 TLIM 6:5 OVT 4:0 Bit Definition Format Allowable Values R/W Undefined – General purpose R/W Undervoltage Threshold The Undervoltage threshold ranges from 2.30V to 2.90V and is calculated by the ...
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IN-CIRCUIT DEBUG Embedded debugging capability is available through the JTAG-compatible Test Access Port. Embedded debug hardware and embedded ROM firmware provide in-circuit debugging capability to the user application, eliminating the need for an expensive in-circuit emulator. Figure 21 shows a ...
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APPLICATIONS The low-power, high-performance RISC architecture of the DS2790 makes it an excellent fit for many portable or battery-powered applications that require cost-effective computing and analog measurement capability. The high- throughput core is programmable in-circuit over the 2-wire and JTAG ...
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PIN CONFIGURATION DS2790G PLS SCL 7 PAD SDA 8 TDI/INT0/P0.0 9 TMS/INT1/P0.1 10 SNS2 11 IS2 8mm × 4mm TDFN-28 PACKAGE INFORMATION (The package ...