HCPL-8100 Avago Technologies US Inc., HCPL-8100 Datasheet - Page 9

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HCPL-8100

Manufacturer Part Number
HCPL-8100
Description
OPTOCOUPLER LINE DRIVER 8DIP
Manufacturer
Avago Technologies US Inc.
Datasheet

Specifications of HCPL-8100

Function
Current Source
Voltage - Input
4.75 ~ 5.25 V
Current - Output
1A
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
8-DIP (0.300", 7.62mm)
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Accuracy
-
Sensing Method
-
Lead Free Status / Rohs Status
 Details
Application Information
The HCPL-8100 and HCPL-0810 are designed to work with
various transceivers and can be used with a variety of
modulation methods including ASK, FSK and BPSK. Figure
17 shows a typical application in a powerline modem using
Frequency Shift Keying (FSK) modulation scheme.
Figure 17. Schematic of HCPL-8100 or HCPL-0810 application for FSK modulation scheme.
Line Driver
The line driver is capable of driving powerline load imped-
ances with output signals up to 4 V
of the line driver is controlled externally via a resistor R
connected from pin 4 to ground. The optimum biasing
point value for modulation frequencies up to 150 kHz
is 4 kW. For higher frequency operation with certain
modulation schemes, it may be necessary to reduce the
resistor value to enable compliance with international
regulations.
The output of the line driver is coupled onto the powerline
using a simple LC coupling circuit as shown in Figure
18. Refer to Table 1 for some typical component values.
Capacitor C and inductor L1 attenuate the 50/60 Hz
powerline transmission frequency. A suitable value for
L1 can range in value from 00 µH to 1 mH. To reduce the
series coupling impedance at the modulation frequency,
L is included to compensate the reactive impedance of
C. This inductor should be a low resistive type capable
of meeting the peak current requirements. To meet many
regulatory requirements, capacitor C needs to be an X
type. Since these types of capacitors typically have a very
wide tolerance range of 0%, it is recommended to use as
low Q factor as possible for the L/C combination. Using
a high Q coupling circuit will result in a wide tolerance on
PLM
Transceiver
STATUS
TX-EN
TX
F ilter
Gain = − R2 / R1
C1
100 nF
24 kΩ
R1
R
ref
PP
. The internal biasing
1
2
3
4
Status
Tx-en
Tx-in
R ref
HCPL - 8100/0810
R2
ref
Tx -out
GND
GND
V
CC
the overall coupling impedance, causing potential commu-
nication difficulties with low powerline impedances. Occa-
sionally with other circuit configurations, a high Q coupling
arrangement is recommended, e.g., C less than 100 nF. In
this case it is normally used as a compromise to filter out
of band harmonics originating from the line driver. This is
not required with the HCPL-8100 or HCPL-0810.
Figure 18. LC coupling network.
Table 1. Typical component values
for LC coupling network.
Tx
Carrier
Frequency (kHz)
110
10
13
150
8
7
6
5
1 µF
C3
100 nF
C4
2 Ω
R3
100 µF
L2
L (µH) C (nF)
C5
5 V
6.8
6.8
15
10
1 µF
C3
LC Coupling
GND
L1
150
0
0
0
L2
C2
X2
L
N
D1
L1
330 µH
C2
X2
L
N

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