MAX6953EAX+ Maxim Integrated Products, MAX6953EAX+ Datasheet - Page 10

• Manufacturer Part Number: MAX6953EAX+
• Description: IC DRVR DSPL LED 36-SSOP
• Manufacturer: Maxim Integrated Products

Specifications of MAX6953EAX+

• Display Type: LED
• Configuration: 5 x 7 (Matrix)
• Interface: I²C
• Digits Or Characters: 4 Digits
• Current - Supply: 12mA
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-SSOP
• Number Of Digits: 4
• Number Of Segments: 140
• Low Level Output Current: 500 mA
• High Level Output Current: 50 mA
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Supply Current: 15 mA
• Maximum Power Dissipation: 941.2 mW
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

digit appears to flip between two characters. To make a
character appear to blink on or off, write the character
to one plane, and use the blank character (0x20) for the
other plane. Once blinking has been configured, it con-
tinues automatically without further intervention.
The blink speed is determined by frequency of the mul-
tiplex clock, OSC, and by setting the Blink Rate
Selection Bit B (Table 9) in the configuration register.
The Blink Rate Selection Bit B sets either fast or slow
blink speed for the whole display.
On initial power-up, all control registers are reset, the
display is blanked, intensities are set to minimum, and
shutdown is enabled (Table 6).
The configuration register is used to enter and exit shut-
down, select the blink rate, globally enable and disable
the blink function, globally clear the digit data, and
reset the blink timing (Table 7).
The S bit in the configuration register selects shutdown
or normal operation. The display driver can be pro-
grammed while in shutdown mode, and shutdown mode
is overridden when in the display test mode. For normal
operation, the S bit should be set to 1 (Table 8).
The B bit in the configuration register selects the blink
rate. This is the speed that the segments alternate
between plane P0 and plane P1 refresh data. The blink
rate is determined by the frequency of the multiplex clock
OSC, in addition to the setting of the B bit (Table 9).
2-Wire Interfaced, 2.7V to 5.5V, 4-Digit 5
Matrix LED Display Driver
Figure 9. n Data Bytes Received
10
______________________________________________________________________________________
S
HOW COMMAND BYTE AND DATA BYTE MAP INTO
Blink Rate Selection (B Data Bit D2) Format
Shutdown Mode (S Data Bit D0) Format
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX6953
MAX6953'S REGISTERS
Configuration Register
R/W
Initial Power-Up
0
A
Blink Speed
D15 D14 D13 D12 D11 D10
COMMAND BYTE
ACKNOWLEDGE FROM MAX6953
Table 3. MAX6953 Address Map
GND
GND
GND
GND
SDA
SDA
SDA
SDA
AD1
SCL
SCL
SCL
SCL
V+
V+
V+
V+
D9
PIN
D8
GND
GND
GND
GND
AD0
SDA
SDA
SDA
SDA
SCL
SCL
SCL
SCL
V+
V+
V+
V+
A
D7
A6
D6
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D5
A5
ACKNOWLEDGE FROM MAX6953
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
AUTOINCREMENT MEMORY WORD ADDRESS
D4
n BYTES
DATA BYTE
DEVICE ADDRESS
A4
D3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D2
A3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D1
A2
D0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
7
A
A1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
P
A0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1