CP2403-GM Silicon Laboratories Inc, CP2403-GM Datasheet - Page 59

• Manufacturer Part Number: CP2403-GM
• Description: IC LCD DRIVER 32QFN
• Manufacturer: Silicon Laboratories Inc

Specifications of CP2403-GM

• Package / Case: 32-QFN
• Display Type: LCD
• Configuration: 64 Segment
• Interface: I²C, SMBus
• Current - Supply: 620µA
• Voltage - Supply: 1.8 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus
• Maximum Clock Frequency: 25 MHz
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Digits Or Characters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1864-5

SFR Definition 9.5. MSCF: Master Configuration Register
Address = 0xA1
Note: When the band gap is configured for low power mode with loose voltage regulation, the LCD0CF register should be
Name
Reset
7:6
5:1
Bit
Type
0
Bit
adjusted so that charge pump cycles occur at least once every 2 ms.
BGMD[1:0] Band Gap Power Mode.
Reserved
CPBYP
Name
R/W
7
0
BGMD[1:0]
00: Band Gap is in Normal Power Mode.
01: Reserved.
10: Band Gap is configured for low power with loose voltage regulation
(required setting for Shutdown Mode).
11: Band Gap is configured for low power with tight voltage regulation.
Read = Varies. Must write 00000b.
Charge Pump Bypass.
When set to 1, the charge pump is bypassed and disabled. VDD is used as the VLCD supply
voltage.
R/W
6
0
Reserved
R/W
5
0
Reserved
Rev. 1.0
R/W
4
0
Reserved
Function
R/W
3
0
Reserved
R/W
2
0
CP2400/1/2/3
Reserved
R/W
1
0
CPBYP
R/W
0
0
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